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From: Lee Jones <lee.jones@linaro.org>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org, tglx@linutronix.de,
	lee.jones@linaro.org, kernel@stlinux.com, jason@lakedaemon.net
Subject: [PATCH 3/6] irqchip: irq-st: Add documentation for STi based syscfg IRQs
Date: Tue, 29 Jul 2014 15:05:41 +0100	[thread overview]
Message-ID: <1406642744-22589-4-git-send-email-lee.jones@linaro.org> (raw)
In-Reply-To: <1406642744-22589-1-git-send-email-lee.jones@linaro.org>

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 .../interrupt-controller/st,sti-irq-syscfg.txt     | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
new file mode 100644
index 0000000..ced6014
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
@@ -0,0 +1,35 @@
+STMicroelectronics STi System Configuration Controlled IRQs
+-----------------------------------------------------------
+
+On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
+and PL310 L2 Cache IRQs are controlled using System Configuration registers.
+This driver is used to unmask them prior to use.
+
+Required properties:
+- compatible	: Should be set to one of:
+			"st,stih415-irq-syscfg"
+			"st,stih416-irq-syscfg"
+			"st,stih407-irq-syscfg"
+			"st,stid127-irq-syscfg"
+- st,syscfg	: Phandle to Cortex-A9 IRQ system config registers
+- st,irq-device	: Array of IRQs to enable - should be 2 in length
+- st,fiq-device	: Array of FIQs to enable - should be 2 in length
+
+Optional properties:
+- st,invert-ext	: External IRQs can be inverted at will.  This property inverts
+		  these IRQs using bitwise logic.  A number of defines have been
+		  provided for convenience:
+			ST_IRQ_SYSCFG_EXT_1_INV
+			ST_IRQ_SYSCFG_EXT_2_INV
+			ST_IRQ_SYSCFG_EXT_3_INV
+Example:
+
+irq-syscfg {
+	compatible    = "st,stih416-irq-syscfg";
+	st,syscfg     = <&syscfg_cpu>;
+	st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
+			<ST_IRQ_SYSCFG_PMU_1>;
+	st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
+			<ST_IRQ_SYSCFG_DISABLED>;
+	st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
+};
-- 
1.9.1

  parent reply	other threads:[~2014-07-29 14:05 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-29 14:05 [PATCH 0/5] irqchip: New driver for ST's SysCfg controlled IRQs Lee Jones
2014-07-29 14:05 ` [PATCH 1/6] dt: bindings: Supply shared ST IRQ defines Lee Jones
2014-07-29 14:05 ` [PATCH 2/6] irqchip: Supply new driver for STi based devices Lee Jones
     [not found]   ` <1406642744-22589-3-git-send-email-lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-08-18 12:32     ` Jason Cooper
     [not found]       ` <20140818123208.GR12769-u4khhh1J0LxI1Ri9qeTfzeTW4wlIGRCZ@public.gmane.org>
2014-09-26  9:34         ` Lee Jones
2014-07-29 14:05 ` Lee Jones [this message]
2014-08-18 12:05   ` [PATCH 3/6] irqchip: irq-st: Add documentation for STi based syscfg IRQs Jason Cooper
2014-09-26  9:51     ` Lee Jones
2014-07-29 14:05 ` [PATCH 4/6] ARM: STi: STiH416: Enable Cortex-A9 PMU support Lee Jones
     [not found] ` <1406642744-22589-1-git-send-email-lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2014-07-29 14:05   ` [PATCH 5/6] ARM: STi: STiH416: Enable PMU IRQs Lee Jones
2014-07-29 14:05 ` [PATCH 6/6] ARM: STI: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot Lee Jones

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