From: Soren Brinkmann <soren.brinkmann@xilinx.com>
To: Michal Simek <michal.simek@xilinx.com>,
Russell King <linux@arm.linux.org.uk>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org, "Pawel Moll" <pawel.moll@arm.com>,
linux-pm@vger.kernel.org,
"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
linux-kernel@vger.kernel.org,
"Sören Brinkmann" <soren.brinkmann@xilinx.com>,
"Kumar Gala" <galak@codeaurora.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/9] Documentation: devicetree: Add binding for Synopsys DDR controller
Date: Wed, 20 Aug 2014 13:41:48 -0700 [thread overview]
Message-ID: <1408567315-28479-3-git-send-email-soren.brinkmann@xilinx.com> (raw)
In-Reply-To: <1408567315-28479-1-git-send-email-soren.brinkmann@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
---
.../devicetree/bindings/memory-controllers/synopsys.txt | 11 +++++++++++
1 file changed, 11 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/synopsys.txt
diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
new file mode 100644
index 000000000000..f9c6454146b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
@@ -0,0 +1,11 @@
+Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
+
+Required properties:
+ - compatible: Should be 'xlnx,zynq-ddrc-a05'
+ - reg: Base address and size of the controllers memory area
+
+Example:
+ memory-controller@f8006000 {
+ compatible = "xlnx,zynq-ddrc-a05";
+ reg = <0xf8006000 0x1000>;
+ };
--
2.0.1.1.gfbfc394
next prev parent reply other threads:[~2014-08-20 20:41 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-20 20:41 [PATCH 0/9] Zynq PM updates Soren Brinkmann
[not found] ` <1408567315-28479-1-git-send-email-soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-08-20 20:41 ` [PATCH 1/9] ARM: zynq: PM: Enable A9 internal clock gating feature Soren Brinkmann
[not found] ` <1408567315-28479-2-git-send-email-soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-08-21 12:19 ` Michal Simek
2014-08-21 17:20 ` Sören Brinkmann
2014-08-20 20:41 ` Soren Brinkmann [this message]
2014-08-20 20:41 ` [PATCH 3/9] ARM: zynq: DT: Add DDRC node Soren Brinkmann
2014-08-20 20:41 ` [PATCH 4/9] ARM: zynq: PM: Enable DDR self-refresh and clock stop Soren Brinkmann
2014-08-21 12:25 ` Michal Simek
2014-08-21 18:59 ` Sören Brinkmann
2014-08-20 20:41 ` [PATCH 5/9] ARM: zynq: Remove invalidate cache for cpu die Soren Brinkmann
2014-08-20 20:41 ` [PATCH 6/9] ARM: zynq: cpuidle: Remove pointless code Soren Brinkmann
2014-08-20 20:41 ` [PATCH 7/9] ARM: zynq: Synchronise zynq_cpu_die/kill Soren Brinkmann
2014-08-20 20:41 ` [PATCH 8/9] ARM: zynq: Remove hotplug.c Soren Brinkmann
2014-08-21 1:32 ` Daniel Lezcano
2014-08-21 23:38 ` Sören Brinkmann
2014-08-20 20:41 ` [PATCH 9/9] ARM: zynq: Rename 'zynq_platform_cpu_die' Soren Brinkmann
2014-08-21 12:28 ` Michal Simek
2014-08-21 19:02 ` Sören Brinkmann
2014-08-22 5:52 ` Michal Simek
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