* [PATCH v3] apf27dev: add max1027 in the dts
@ 2014-08-31 20:40 Philippe Reynes
2014-09-01 8:24 ` Shawn Guo
0 siblings, 1 reply; 2+ messages in thread
From: Philippe Reynes @ 2014-08-31 20:40 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel, devicetree
Cc: shawn.guo, kernel, shc_work, Philippe Reynes
Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
---
arch/arm/boot/dts/imx27-apf27dev.dts | 17 +++++++++++++++++
1 files changed, 17 insertions(+), 0 deletions(-)
Changelog:
v3: (thanks Alexander Shiyan for the feedback)
- add datasheet pin name as comment
v2: (thanks Alexander Shiyan for the feedback)
- spi mode 0 is the default so no need to explicitly define it
diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts
index b982309..0c08fbb 100644
--- a/arch/arm/boot/dts/imx27-apf27dev.dts
+++ b/arch/arm/boot/dts/imx27-apf27dev.dts
@@ -82,6 +82,16 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
status = "okay";
+
+ adc@0 {
+ compatible = "maxim,max1027";
+ reg = <0>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_max1027>;
+ spi-max-frequency = <10000000>;
+ };
};
&cspi2 {
@@ -230,6 +240,13 @@
pinctrl_sdhc2_cd: sdhc2cdgrp {
fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>;
};
+
+ pinctrl_max1027: max1027 {
+ fsl,pins = <
+ MX27_PAD_UART1_CTS__GPIO5_14 0 /* CNVST */
+ MX27_PAD_UART1_RTS__GPIO5_15 0 /* EOC */
+ >;
+ };
};
};
--
1.7.4.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v3] apf27dev: add max1027 in the dts
2014-08-31 20:40 [PATCH v3] apf27dev: add max1027 in the dts Philippe Reynes
@ 2014-09-01 8:24 ` Shawn Guo
0 siblings, 0 replies; 2+ messages in thread
From: Shawn Guo @ 2014-09-01 8:24 UTC (permalink / raw)
To: Philippe Reynes
Cc: linux-kernel, linux-arm-kernel, devicetree, kernel, shc_work
On Sun, Aug 31, 2014 at 10:40:29PM +0200, Philippe Reynes wrote:
>
> Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
> ---
> arch/arm/boot/dts/imx27-apf27dev.dts | 17 +++++++++++++++++
> 1 files changed, 17 insertions(+), 0 deletions(-)
>
> Changelog:
> v3: (thanks Alexander Shiyan for the feedback)
> - add datasheet pin name as comment
>
> v2: (thanks Alexander Shiyan for the feedback)
> - spi mode 0 is the default so no need to explicitly define it
>
> diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts
> index b982309..0c08fbb 100644
> --- a/arch/arm/boot/dts/imx27-apf27dev.dts
> +++ b/arch/arm/boot/dts/imx27-apf27dev.dts
> @@ -82,6 +82,16 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>;
> status = "okay";
> +
> + adc@0 {
> + compatible = "maxim,max1027";
> + reg = <0>;
> + interrupt-parent = <&gpio5>;
> + interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_max1027>;
> + spi-max-frequency = <10000000>;
> + };
> };
>
> &cspi2 {
> @@ -230,6 +240,13 @@
> pinctrl_sdhc2_cd: sdhc2cdgrp {
> fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>;
> };
> +
> + pinctrl_max1027: max1027 {
The pinctrl entries are alphabetically sorted in there. Can you also do
that for your addition?
> + fsl,pins = <
> + MX27_PAD_UART1_CTS__GPIO5_14 0 /* CNVST */
> + MX27_PAD_UART1_RTS__GPIO5_15 0 /* EOC */
Can you follow the convention to use hex value for the config cell,
i.e. s/0/0x0?
Shawn
> + >;
> + };
> };
> };
>
> --
> 1.7.4.4
>
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