From: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: shawn.guo-KZfg59tc24xl57MIdRCFDg@public.gmane.org
Cc: arnd-r2nGTMty4D4@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Subject: [PATCHv4 6/6] ARM: imx: Add Freescale LS1021A SMP support
Date: Mon, 22 Sep 2014 15:45:52 +0800 [thread overview]
Message-ID: <1411371952-5618-7-git-send-email-jingchang.lu@freescale.com> (raw)
In-Reply-To: <1411371952-5618-1-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
From: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/common.h | 1 +
arch/arm/mach-imx/mach-ls1021a.c | 1 +
arch/arm/mach-imx/platsmp.c | 32 ++++++++++++++++++++++++++++++++
4 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index ce137bc..38d75e2 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -89,7 +89,7 @@ obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
-ifdef CONFIG_SOC_IMX6
+ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_LS1021A),)
AFLAGS_headsmp.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 1dabf43..c473ca5 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -157,5 +157,6 @@ static inline void imx_init_l2cache(void) {}
#endif
extern struct smp_operations imx_smp_ops;
+extern struct smp_operations ls1021a_smp_ops;
#endif
diff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c
index 9d2034b..b89c858 100644
--- a/arch/arm/mach-imx/mach-ls1021a.c
+++ b/arch/arm/mach-imx/mach-ls1021a.c
@@ -17,5 +17,6 @@ static const char * const ls1021a_dt_compat[] __initconst = {
};
DT_MACHINE_START(LS1021A, "Freescale LS1021A")
+ .smp = smp_ops(ls1021a_smp_ops),
.dt_compat = ls1021a_dt_compat,
MACHINE_END
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 771bd25..62376f0 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -16,6 +16,8 @@
#include <asm/page.h>
#include <asm/smp_scu.h>
#include <asm/mach/map.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include "common.h"
#include "hardware.h"
@@ -94,3 +96,33 @@ struct smp_operations imx_smp_ops __initdata = {
.cpu_kill = imx_cpu_kill,
#endif
};
+
+#define DCFG_CCSR_SCRATCHRW1 0x200
+
+static int ls1021a_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ arch_send_wakeup_ipi_mask(cpumask_of(cpu));
+
+ return 0;
+}
+
+static void __init ls1021a_smp_prepare_cpus(unsigned int max_cpus)
+{
+ struct device_node *np;
+ void __iomem *dcfg_base;
+ unsigned long paddr;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-dcfg");
+ dcfg_base = of_iomap(np, 0);
+ BUG_ON(!dcfg_base);
+
+ paddr = virt_to_phys(secondary_startup);
+ writel_relaxed(cpu_to_be32(paddr), dcfg_base + DCFG_CCSR_SCRATCHRW1);
+
+ iounmap(dcfg_base);
+}
+
+struct smp_operations ls1021a_smp_ops __initdata = {
+ .smp_prepare_cpus = ls1021a_smp_prepare_cpus,
+ .smp_boot_secondary = ls1021a_boot_secondary,
+};
--
1.8.0
--
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next prev parent reply other threads:[~2014-09-22 7:45 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-22 7:45 (unknown), Jingchang Lu
[not found] ` <1411371952-5618-1-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-09-22 7:45 ` [PATCHv4 1/6] ARM: dts: Add SoC level device tree support for LS1021A Jingchang Lu
[not found] ` <1411371952-5618-2-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-09-26 5:49 ` Shawn Guo
2014-09-22 7:45 ` [PATCHv4 2/6] ARM: dts: Add initial LS1021A QDS board dts support Jingchang Lu
2014-09-26 6:13 ` Shawn Guo
2014-09-26 7:51 ` Li.Xiubo-KZfg59tc24xl57MIdRCFDg
2014-09-28 8:48 ` Jingchang Lu
[not found] ` <7ecfaed8cb1b4c228ee2eb20aab33429-AZ66ij2kwab4MB1ZSnT4iOO6mTEJWrR4XA4E9RH9d+qIuWR1G4zioA@public.gmane.org>
2014-09-30 9:39 ` Arnd Bergmann
2014-09-22 7:45 ` [PATCHv4 3/6] ARM: dts: Add initial LS1021A TWR " Jingchang Lu
[not found] ` <1411371952-5618-4-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-09-23 14:54 ` Arnd Bergmann
2014-09-24 5:47 ` Jingchang Lu
[not found] ` <a83d5601a26b4e45be5e5016de287287-AZ66ij2kwab4MB1ZSnT4iOO6mTEJWrR4XA4E9RH9d+qIuWR1G4zioA@public.gmane.org>
2014-09-24 9:36 ` Arnd Bergmann
2014-09-24 11:00 ` Jingchang Lu
[not found] ` <bb122a232a1c40559e84a058f3d003b4-AZ66ij2kwab4MB1ZSnT4iOO6mTEJWrR4XA4E9RH9d+qIuWR1G4zioA@public.gmane.org>
2014-09-24 15:54 ` Arnd Bergmann
2014-09-25 8:06 ` Jingchang Lu
[not found] ` <1b72af7d8c90492ba91115ef958bbda7-GeMU99GfrruQxk8BmD671+O6mTEJWrR4XA4E9RH9d+qIuWR1G4zioA@public.gmane.org>
2014-09-25 10:57 ` Arnd Bergmann
2014-09-22 7:45 ` [PATCHv4 4/6] dt-bindings: arm: add Freescale LS1021A SoC device tree binding Jingchang Lu
[not found] ` <1411371952-5618-5-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-09-26 6:18 ` Shawn Guo
2014-09-22 7:45 ` [PATCHv4 5/6] ARM: imx: Add initial support for Freescale LS1021A Jingchang Lu
[not found] ` <1411371952-5618-6-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-09-26 6:30 ` Shawn Guo
2014-09-22 7:45 ` Jingchang Lu [this message]
2014-09-26 6:33 ` [PATCHv4 6/6] ARM: imx: Add Freescale LS1021A SMP support Shawn Guo
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