[PATCH 0/4] ARM: DT: apq8064 DT patches.

[PATCH 0/4] ARM: DT: apq8064 DT patches.

[Srinivas Kandagatla]

These patches adds dt nodes for RPM, USB and SATA IPs found in APQ8064.
All the driver support for these IPs are already available in v3.17, except
the RPM driver which is now accepted by Lee and Mark.

These patches depend on the header file from 
http://www.spinics.net/lists/arm-kernel/msg364310.html
for regulators.

Now that the RPM patch is accepted, should RPM patch go via arm-soc tree?
so that we can get more functionality on IFC6410 board in v3.18 mainline.

All these patches are tested on IFC6410 board.
Am hoping to get these patches for v3.18, as these patches were sitting in
my dev tree since last 3 merge windows.

Thanks,
srini

Srinivas Kandagatla (4):
  ARM: DT: apq8064: add rpm support
  ARM: DT: apq8064: Add usb host support.
  ARM: DT: apq8064: Add USB OTG support
  ARM: DT: apq8064: Add SATA controller support.

 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  30 +++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 190 +++++++++++++++++++++++++++++
 2 files changed, 220 insertions(+)

-- 
1.9.1

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[PATCH 1/4] ARM: DT: apq8064: add rpm support

[Srinivas Kandagatla]

This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b3154c0..9c2c8e6 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -3,6 +3,7 @@
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -246,6 +247,24 @@
 			#reset-cells = <1>;
 		};
 
+		apcs: syscon@2011000 {
+			compatible = "syscon";
+			reg = <0x2011000 0x1000>;
+		};
+
+		rpm@108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc = <&apcs 0x8 2>;
+
+			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
+			interrupt-names = "ack", "err", "wakeup";
+
+			#address-cells	= <1>;
+			#size-cells	= <0>;
+
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Stephen Boyd]

On 09/29/14 02:14, Srinivas Kandagatla wrote:
> @@ -246,6 +247,24 @@
>  			#reset-cells = <1>;
>  		};
>  
> +		apcs: syscon@2011000 {
> +			compatible = "syscon";
> +			reg = <0x2011000 0x1000>;
> +		};

This is actually a clock controller block that hw designers decided was
good place to shove the ipc bits (because there's room!). Can we call it

                l2cc: clock-controller@2011000 {
                        compatible = "syscon";
                        reg = <0x2011000 0x1000>;
                };

Eventually I'll add the specific krait compatible when we merge krait
clock support:

                l2cc: clock-controller@2011000 {
                        compatible = "qcom,kpss-gcc", "syscon";
                        reg = <0x2011000 0x1000>;
                        clock-output-names = "acpu_l2_aux";
                };

> +
> +		rpm@108000 {
> +			compatible	= "qcom,rpm-apq8064";
> +			reg		= <0x108000 0x1000>;
> +			qcom,ipc = <&apcs 0x8 2>;

There are actually 3 ipc bits. I guess if we ever have to use the other
two we'll extend this binding to have the other bits specified some
other way?

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Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Bjorn Andersson]

On Mon 29 Sep 15:17 PDT 2014, Stephen Boyd wrote:

> On 09/29/14 02:14, Srinivas Kandagatla wrote:
> > @@ -246,6 +247,24 @@
> >  			#reset-cells = <1>;
> >  		};
> >  
> > +		apcs: syscon@2011000 {
> > +			compatible = "syscon";
> > +			reg = <0x2011000 0x1000>;
> > +		};
> 
> This is actually a clock controller block that hw designers decided was
> good place to shove the ipc bits (because there's room!). Can we call it
> 
>                 l2cc: clock-controller@2011000 {
>                         compatible = "syscon";
>                         reg = <0x2011000 0x1000>;
>                 };
> 
> Eventually I'll add the specific krait compatible when we merge krait
> clock support:
> 
>                 l2cc: clock-controller@2011000 {
>                         compatible = "qcom,kpss-gcc", "syscon";
>                         reg = <0x2011000 0x1000>;
>                         clock-output-names = "acpu_l2_aux";
>                 };
> 

As long as we can get hold of the regmap that would be fine. I pressume the
idea is to have the kpss-gcc using syscon, just like the rpm. But hopefully the
syscon patches that are floating around (merged?) will allow any driver to
expose a "syscon regmap".

> > +
> > +		rpm@108000 {
> > +			compatible	= "qcom,rpm-apq8064";
> > +			reg		= <0x108000 0x1000>;
> > +			qcom,ipc = <&apcs 0x8 2>;
> 
> There are actually 3 ipc bits. I guess if we ever have to use the other
> two we'll extend this binding to have the other bits specified some
> other way?

I haven't seen any indications of us using more than this bit. If we want to do
that, we could simply make it <&apcs 8 2 &apcs 8 3 &apcs 8 4> (or whatever
those indices are). That way this should be easy it keep compatible.

Regards,
Bjorn

Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Stephen Boyd]

On 09/29/14 22:02, Bjorn Andersson wrote:
> On Mon 29 Sep 15:17 PDT 2014, Stephen Boyd wrote:
>
>> On 09/29/14 02:14, Srinivas Kandagatla wrote:
>>> @@ -246,6 +247,24 @@
>>>  			#reset-cells = <1>;
>>>  		};
>>>  
>>> +		apcs: syscon@2011000 {
>>> +			compatible = "syscon";
>>> +			reg = <0x2011000 0x1000>;
>>> +		};
>> This is actually a clock controller block that hw designers decided was
>> good place to shove the ipc bits (because there's room!). Can we call it
>>
>>                 l2cc: clock-controller@2011000 {
>>                         compatible = "syscon";
>>                         reg = <0x2011000 0x1000>;
>>                 };
>>
>> Eventually I'll add the specific krait compatible when we merge krait
>> clock support:
>>
>>                 l2cc: clock-controller@2011000 {
>>                         compatible = "qcom,kpss-gcc", "syscon";
>>                         reg = <0x2011000 0x1000>;
>>                         clock-output-names = "acpu_l2_aux";
>>                 };
>>
> As long as we can get hold of the regmap that would be fine. I pressume the
> idea is to have the kpss-gcc using syscon, just like the rpm. But hopefully the
> syscon patches that are floating around (merged?) will allow any driver to
> expose a "syscon regmap".

Agreed. I'm not sure if kpss-gcc will use syscon. With the floating
patches I don't see a reason why we need to use it.

>
>>> +
>>> +		rpm@108000 {
>>> +			compatible	= "qcom,rpm-apq8064";
>>> +			reg		= <0x108000 0x1000>;
>>> +			qcom,ipc = <&apcs 0x8 2>;
>> There are actually 3 ipc bits. I guess if we ever have to use the other
>> two we'll extend this binding to have the other bits specified some
>> other way?
> I haven't seen any indications of us using more than this bit. If we want to do
> that, we could simply make it <&apcs 8 2 &apcs 8 3 &apcs 8 4> (or whatever
> those indices are). That way this should be easy it keep compatible.
>

Good to hear we're not forced to use a new property. The indices have
always been 2, 1, and 0 as far as I know.

We use bit 1 to ack the RPM if it ever crashes. We know that it crashes
because we receive the error interrupt. Instead of calling panic like we
do downstream we can gracefully fail any new rpm requests. There really
isn't any way to recover from this scenario though besides rebooting.
Looking at the code I see this is all wrong and we use bit 2 to ack the
error.

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hosted by The Linux Foundation

Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Bjorn Andersson]

On Tue 30 Sep 11:27 PDT 2014, Stephen Boyd wrote:

> On 09/29/14 22:02, Bjorn Andersson wrote:
> > On Mon 29 Sep 15:17 PDT 2014, Stephen Boyd wrote:
> >
> >> On 09/29/14 02:14, Srinivas Kandagatla wrote:
> >>> @@ -246,6 +247,24 @@
> >>>  			#reset-cells = <1>;
> >>>  		};
> >>>  
> >>> +		apcs: syscon@2011000 {
> >>> +			compatible = "syscon";
> >>> +			reg = <0x2011000 0x1000>;
> >>> +		};
> >> This is actually a clock controller block that hw designers decided was
> >> good place to shove the ipc bits (because there's room!). Can we call it
> >>
> >>                 l2cc: clock-controller@2011000 {
> >>                         compatible = "syscon";
> >>                         reg = <0x2011000 0x1000>;
> >>                 };
> >>
> >> Eventually I'll add the specific krait compatible when we merge krait
> >> clock support:
> >>
> >>                 l2cc: clock-controller@2011000 {
> >>                         compatible = "qcom,kpss-gcc", "syscon";
> >>                         reg = <0x2011000 0x1000>;
> >>                         clock-output-names = "acpu_l2_aux";
> >>                 };
> >>
> > As long as we can get hold of the regmap that would be fine. I pressume the
> > idea is to have the kpss-gcc using syscon, just like the rpm. But hopefully the
> > syscon patches that are floating around (merged?) will allow any driver to
> > expose a "syscon regmap".
> 
> Agreed. I'm not sure if kpss-gcc will use syscon. With the floating
> patches I don't see a reason why we need to use it.
> 


All we need is a regmap for the kpss-gcc, but the restriction that it has to be 
a syscon is more of a implementation detail. But you probably don't want to 
implement the phandle->regmap lookup code in kpss-gcc (and all the other
places) and if I understand the syscon improvements being suggested they are
supposed to help with exactly that (help any device expose regmaps).

Need to look into that again though.

> >
> >>> +
> >>> +		rpm@108000 {
> >>> +			compatible	= "qcom,rpm-apq8064";
> >>> +			reg		= <0x108000 0x1000>;
> >>> +			qcom,ipc = <&apcs 0x8 2>;
> >> There are actually 3 ipc bits. I guess if we ever have to use the other
> >> two we'll extend this binding to have the other bits specified some
> >> other way?
> > I haven't seen any indications of us using more than this bit. If we want to do
> > that, we could simply make it <&apcs 8 2 &apcs 8 3 &apcs 8 4> (or whatever
> > those indices are). That way this should be easy it keep compatible.
> >
> 
> Good to hear we're not forced to use a new property. The indices have
> always been 2, 1, and 0 as far as I know.
> 
> We use bit 1 to ack the RPM if it ever crashes. We know that it crashes
> because we receive the error interrupt. Instead of calling panic like we
> do downstream we can gracefully fail any new rpm requests. There really
> isn't any way to recover from this scenario though besides rebooting.
> Looking at the code I see this is all wrong and we use bit 2 to ack the
> error.
> 

Hmm, seems I got that wrong, sorry about that.

But do you mean "all wrong" as in that I use the wrong bit or to some greater
extent? Currently all following requests should timeout, but maybe we should
have a faster fail-path when we've hit this point?


>From a practical pov I guess that once the rpm starts returning errors on
updates to regulators, root clocks and bus scaling then most of the system is
becoming useless.

Regards,
Bjorn

Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Stephen Boyd]

On 09/30/14 12:00, Bjorn Andersson wrote:
>
> Hmm, seems I got that wrong, sorry about that.
>
> But do you mean "all wrong" as in that I use the wrong bit or to some greater
> extent? Currently all following requests should timeout, but maybe we should
> have a faster fail-path when we've hit this point?

Yes. We just ack the interrupt and go on happy to keep allowing clients
to request things. I'd rather see us blow up or start failing requests,
or maybe both.

>
> From a practical pov I guess that once the rpm starts returning errors on
> updates to regulators, root clocks and bus scaling then most of the system is
> becoming useless.

Right. Rebooting will be required fairly soon.

-- 
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hosted by The Linux Foundation

Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Bjorn Andersson]

On Tue 30 Sep 12:13 PDT 2014, Stephen Boyd wrote:

> On 09/30/14 12:00, Bjorn Andersson wrote:
> >
> > Hmm, seems I got that wrong, sorry about that.
> >
> > But do you mean "all wrong" as in that I use the wrong bit or to some greater
> > extent? Currently all following requests should timeout, but maybe we should
> > have a faster fail-path when we've hit this point?
> 
> Yes. We just ack the interrupt and go on happy to keep allowing clients
> to request things. I'd rather see us blow up or start failing requests,
> or maybe both.
> 

Okay, I naively figured that the RPM would be dead after this happened and from
this point we would start getting timeouts. Let's ack the right bit and fail
early after the RPM have rejected things.

> >
> > From a practical pov I guess that once the rpm starts returning errors on
> > updates to regulators, root clocks and bus scaling then most of the system is
> > becoming useless.
> 
> Right. Rebooting will be required fairly soon.
> 

Yes, but we want something else to trigger that right?

Regards,
Bjorn

Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Srinivas Kandagatla]

On 29/09/14 23:17, Stephen Boyd wrote:
> On 09/29/14 02:14, Srinivas Kandagatla wrote:
>> @@ -246,6 +247,24 @@
>>   			#reset-cells = <1>;
>>   		};
>>
>> +		apcs: syscon@2011000 {
>> +			compatible = "syscon";
>> +			reg = <0x2011000 0x1000>;
>> +		};
>
> This is actually a clock controller block that hw designers decided was
> good place to shove the ipc bits (because there's room!). Can we call it
>
>                  l2cc: clock-controller@2011000 {
>                          compatible = "syscon";
>                          reg = <0x2011000 0x1000>;
>                  };
>
yep, I will rename this in next version.

> Eventually I'll add the specific krait compatible when we merge krait
> clock support:
sounds good.

--srini
>
>                  l2cc: clock-controller@2011000 {
>                          compatible = "qcom,kpss-gcc", "syscon";
>                          reg = <0x2011000 0x1000>;
>                          clock-output-names = "acpu_l2_aux";
>                  };
>
>> +
>> +		rpm@108000 {
>> +			compatible	= "qcom,rpm-apq8064";
>> +			reg		= <0x108000 0x1000>;
>> +			qcom,ipc = <&apcs 0x8 2>;
>
> There are actually 3 ipc bits. I guess if we ever have to use the other
> two we'll extend this binding to have the other bits specified some
> other way?
>

Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Bjorn Andersson]

On Mon 29 Sep 02:14 PDT 2014, Srinivas Kandagatla wrote:

> This patch adds rpm node to apq8064 dt as rpm would be used by other
> devices for regulator support.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
>  arch/arm/boot/dts/qcom-apq8064.dtsi | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index b3154c0..9c2c8e6 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -3,6 +3,7 @@
>  #include "skeleton.dtsi"
>  #include <dt-bindings/clock/qcom,gcc-msm8960.h>
>  #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
> +#include <dt-bindings/mfd/qcom-rpm.h>
>  #include <dt-bindings/soc/qcom,gsbi.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  
> @@ -246,6 +247,24 @@
>  			#reset-cells = <1>;
>  		};
>  
> +		apcs: syscon@2011000 {
> +			compatible = "syscon";
> +			reg = <0x2011000 0x1000>;
> +		};
> +
> +		rpm@108000 {
> +			compatible	= "qcom,rpm-apq8064";
> +			reg		= <0x108000 0x1000>;
> +			qcom,ipc = <&apcs 0x8 2>;

I don't like your indentation, but please stick with one way of doing it :)

> +
> +			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
> +			interrupt-names = "ack", "err", "wakeup";
> +
> +			#address-cells	= <1>;
> +			#size-cells	= <0>;
> +

This part looks good.

But how about adding all the regulators here as well?
Like:

                        pm8921_l5: pm8921-l5 {
				compatible = "qcom,rpm-pm8921-pldo";
				reg = <QCOM_RPM_PM8921_LDO5>;
			};

			...

That way we can update the references from this file (while still allowing the
dts to override it if needed). I'm not sure if we should add some sane defaults
or just completely deferr specifying the voltage ranges to the dts. The benefit
of the latter is that the regulators not configured by the dts author will not
be accessible.

But simply listing all the nodes here would be nice and I dont see much reason
to postpone this work.

> +		};
> +
>  		/* Temporary fixed regulator */
>  		vsdcc_fixed: vsdcc-regulator {
>  			compatible = "regulator-fixed";

Regards,
Bjorn
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Re: [PATCH 1/4] ARM: DT: apq8064: add rpm support

[Srinivas Kandagatla]

On 30/09/14 06:11, Bjorn Andersson wrote:

>>
>> +		apcs: syscon@2011000 {
>> +			compatible = "syscon";
>> +			reg = <0x2011000 0x1000>;
>> +		};
>> +
>> +		rpm@108000 {
>> +			compatible	= "qcom,rpm-apq8064";
>> +			reg		= <0x108000 0x1000>;
>> +			qcom,ipc = <&apcs 0x8 2>;
>
> I don't like your indentation, but please stick with one way of doing it :)
>
I agree, Will fix this in next version.
>> +
>> +			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
>> +			interrupt-names = "ack", "err", "wakeup";
>> +
>> +			#address-cells	= <1>;
>> +			#size-cells	= <0>;
>> +
>
> This part looks good.
>
> But how about adding all the regulators here as well?
Yes we can add for the sake of completeness but w.r.t testing only some 
of them will be tested
> Like:
>
>                          pm8921_l5: pm8921-l5 {
> 				compatible = "qcom,rpm-pm8921-pldo";
> 				reg = <QCOM_RPM_PM8921_LDO5>;
> 			};
>
Adding nodes like this should be trival.
> 			...
>
> That way we can update the references from this file (while still allowing the
> dts to override it if needed). I'm not sure if we should add some sane defaults
> or just completely deferr specifying the voltage ranges to the dts. The benefit
> of the latter is that the regulators not configured by the dts author will not
> be accessible.
>
> But simply listing all the nodes here would be nice and I dont see much reason
> to postpone this work.
Ok.. will be done in next version.


--srini
>
>> +		};
>> +
>>   		/* Temporary fixed regulator */
>>   		vsdcc_fixed: vsdcc-regulator {
>>   			compatible = "regulator-fixed";
>
> Regards,
> Bjorn
>
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[PATCH 2/4] ARM: DT: apq8064: Add usb host support.

[Srinivas Kandagatla]

This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 16 ++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 85 ++++++++++++++++++++++++++++++
 2 files changed, 101 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index b396c83..d6036b8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -40,6 +40,22 @@
 			};
 		};
 
+		usb3_phy:phy@12520000 {
+			status = "ok";
+		};
+
+		usb4_phy:phy@12530000 {
+			status = "ok";
+		};
+
+		usb3: usb@12520000 {
+			status = "ok";
+		};
+
+		usb4: usb@12530000 {
+			status = "ok";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc@12400000 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 9c2c8e6..491a136 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -263,6 +263,91 @@
 			#address-cells	= <1>;
 			#size-cells	= <0>;
 
+			pm8921_s3: pm8921-s3 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS3>;
+
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1400000>;
+				qcom,boot-load 		= <49360>;
+				qcom,switch-mode-frequency = <3200000>;
+				regulator-always-on;
+			};
+
+			pm8921_l3: pm8921-l3 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO3>;
+
+				regulator-min-microvolt = <3050000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				qcom,boot-load = <50000>;
+			};
+
+			pm8921_l23: pm8921-l23 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO23>;
+
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1800000>;
+				qcom,boot-load = <50000>;
+				regulator-always-on;
+			};
+
+		};
+
+		usb3_phy:phy@12520000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 0>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS3_XCVR_CLK>,
+					  <&gcc USB_HS3_H_CLK>;
+			clock-names	= "core", "iface";
+
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+
+			resets		= <&gcc USB_HS3_RESET>;
+			reset-names	= "link";
+		};
+
+		usb4_phy:phy@12530000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 0>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS4_XCVR_CLK>,
+					  <&gcc USB_HS4_H_CLK>;
+			clock-names	= "core", "iface";
+
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+
+			resets		= <&gcc USB_HS4_RESET>;
+			reset-names	= "link";
+		};
+
+		usb3: usb@12520000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 0>;
+			status		= "disabled";
+			usb-phy		= <&usb3_phy>;
+		};
+
+		usb4: usb@12530000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 0>;
+			status		= "disabled";
+			usb-phy		= <&usb4_phy>;
 		};
 
 		/* Temporary fixed regulator */
-- 
1.9.1

Re: [PATCH 2/4] ARM: DT: apq8064: Add usb host support.

[Bjorn Andersson]

On Mon 29 Sep 02:15 PDT 2014, Srinivas Kandagatla wrote:

> This patch adds device tree nodes to support two usb hosts on APQ8064
> SOC.
> 

Sorry for not looking at the entire series before answering patch 1.
I still think you should add all the regulators in the first patch anyways.

> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -263,6 +263,91 @@
>  			#address-cells	= <1>;
>  			#size-cells	= <0>;
>  
> +			pm8921_s3: pm8921-s3 {
> +				compatible	= "qcom,rpm-pm8921-smps";
> +				reg		= <QCOM_RPM_PM8921_SMPS3>;
> +
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1400000>;
> +				qcom,boot-load 		= <49360>;

As it was unclear how to handle load in the driver I dropped boot-load for now.
Please leave it out until someone have added it to the driver.

> +				qcom,switch-mode-frequency = <3200000>;
> +				regulator-always-on;
> +			};
> +
> +			pm8921_l3: pm8921-l3 {
> +				compatible	= "qcom,rpm-pm8921-pldo";
> +				reg		= <QCOM_RPM_PM8921_LDO3>;
> +
> +				regulator-min-microvolt = <3050000>;
> +				regulator-max-microvolt = <3300000>;
> +				regulator-always-on;
> +				qcom,boot-load = <50000>;

Dito

> +			};
> +
> +			pm8921_l23: pm8921-l23 {
> +				compatible	= "qcom,rpm-pm8921-pldo";
> +				reg		= <QCOM_RPM_PM8921_LDO23>;
> +
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1800000>;
> +				qcom,boot-load = <50000>;

Dito

> +				regulator-always-on;

Why are all these "always-on"?

> +			};
> +
> +		};
> +
>  
>  		/* Temporary fixed regulator */
> -- 
> 1.9.1
> 
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Re: [PATCH 2/4] ARM: DT: apq8064: Add usb host support.

[Srinivas Kandagatla]

On 30/09/14 06:17, Bjorn Andersson wrote:
> On Mon 29 Sep 02:15 PDT 2014, Srinivas Kandagatla wrote:
>
>> This patch adds device tree nodes to support two usb hosts on APQ8064
>> SOC.

>> +				compatible	= "qcom,rpm-pm8921-smps";
>> +				reg		= <QCOM_RPM_PM8921_SMPS3>;
>> +
>> +				regulator-min-microvolt = <1000000>;
>> +				regulator-max-microvolt = <1400000>;
>> +				qcom,boot-load 		= <49360>;
>
> As it was unclear how to handle load in the driver I dropped boot-load for now.
> Please leave it out until someone have added it to the driver.

Ok, will drop this in next version.

>
>> +				regulator-always-on;
>
> Why are all these "always-on"?
I added this for a regulator which was shared between hdmi and sata, I 
think for other regualtors this was just a copy paste error. I will 
recheck it once again and send a new version.

thanks,
srini
>
>> +			};
>> +
>> +		};
>> +
>>
>>   		/* Temporary fixed regulator */
>> --
>> 1.9.1
>>

[PATCH 3/4] ARM: DT: apq8064: Add USB OTG support

[Srinivas Kandagatla]

This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 14 +++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 46 ++++++++++++++++++++++++++++++
 2 files changed, 60 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index d6036b8..f41fb39 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -40,6 +40,11 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy:phy@12500000 {
+			status = "ok";
+		};
+
 		usb3_phy:phy@12520000 {
 			status = "ok";
 		};
@@ -48,6 +53,15 @@
 			status = "ok";
 		};
 
+		gadget1:gadget@12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb@12500000 {
+			status = "ok";
+		};
+
 		usb3: usb@12520000 {
 			status = "ok";
 		};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 491a136..38d3efa 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -284,6 +284,16 @@
 				qcom,boot-load = <50000>;
 			};
 
+			pm8921_l4: pm8921-l4 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO4>;
+
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				qcom,boot-load = <50000>;
+			};
+
 			pm8921_l23: pm8921-l23 {
 				compatible	= "qcom,rpm-pm8921-pldo";
 				reg		= <QCOM_RPM_PM8921_LDO23>;
@@ -296,6 +306,25 @@
 
 		};
 
+		usb1_phy:phy@12500000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 0>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS1_XCVR_CLK>,
+					  <&gcc USB_HS1_H_CLK>;
+			clock-names	= "core", "iface";
+
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+
+			resets		= <&gcc USB_HS1_RESET>;
+			reset-names	= "link";
+		};
+
 		usb3_phy:phy@12520000 {
 			compatible	= "qcom,usb-otg-ci";
 			reg		= <0x12520000 0x400>;
@@ -334,6 +363,23 @@
 			reset-names	= "link";
 		};
 
+		gadget1:gadget@12500000 {
+			compatible	= "qcom,ci-hdrc";
+			reg		= <0x12500000 0x400>;
+			status		= "disabled";
+			dr_mode		= "peripheral";
+			interrupts	= <0 100 0>;
+			usb-phy		= <&usb1_phy>;
+		};
+
+		usb1: usb@12500000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 0>;
+			status		= "disabled";
+			usb-phy		= <&usb1_phy>;
+		};
+
 		usb3: usb@12520000 {
 			compatible	= "qcom,ehci-host";
 			reg		= <0x12520000 0x400>;
-- 
1.9.1

Re: [PATCH 3/4] ARM: DT: apq8064: Add USB OTG support

[Kiran Padwal]

Hi Srinivas,

Some review are comments inline.

On Monday 29 September 2014 02:45 PM, Srinivas Kandagatla wrote:
> This patch adds USB OTG support on USB1 of APQ8064 SOC.
> Tested on IFC6410 with ethernet gadget.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 14 +++++++++
>  arch/arm/boot/dts/qcom-apq8064.dtsi        | 46 ++++++++++++++++++++++++++++++
>  2 files changed, 60 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> index d6036b8..f41fb39 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> @@ -40,6 +40,11 @@
>  			};
>  		};
>  
> +		/* OTG */
> +		usb1_phy:phy@12500000 {
> +			status = "ok";

Its canonical value is "okay" (although in practice anything
other than "disabled" should work).

> +		};
> +
>  		usb3_phy:phy@12520000 {
>  			status = "ok";
>  		};
> @@ -48,6 +53,15 @@
>  			status = "ok";
>  		};
>  
> +		gadget1:gadget@12500000 {
> +			status = "ok";
> +		};
> +
> +		/* OTG */
> +		usb1: usb@12500000 {
> +			status = "ok";
> +		};
> +
>  		usb3: usb@12520000 {
>  			status = "ok";
>  		};
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 491a136..38d3efa 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -284,6 +284,16 @@
>  				qcom,boot-load = <50000>;
>  			};
>  
> +			pm8921_l4: pm8921-l4 {
> +				compatible	= "qcom,rpm-pm8921-pldo";
> +				reg		= <QCOM_RPM_PM8921_LDO4>;
> +
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1800000>;
> +				regulator-always-on;
> +				qcom,boot-load = <50000>;
> +			};
> +
>  			pm8921_l23: pm8921-l23 {
>  				compatible	= "qcom,rpm-pm8921-pldo";
>  				reg		= <QCOM_RPM_PM8921_LDO23>;
> @@ -296,6 +306,25 @@
>  
>  		};
>  
> +		usb1_phy:phy@12500000 {
> +			compatible	= "qcom,usb-otg-ci";
> +			reg		= <0x12500000 0x400>;
> +			interrupts	= <0 100 0>;

The trailing 0 might be IRQ_TYPE_NONE?

> +			status		= "disabled";

Usually the status property goes first.


> +			dr_mode		= "host";
> +
> +			clocks		= <&gcc USB_HS1_XCVR_CLK>,
> +					  <&gcc USB_HS1_H_CLK>;
> +			clock-names	= "core", "iface";
> +
> +			vddcx-supply	= <&pm8921_s3>;
> +			v3p3-supply	= <&pm8921_l3>;
> +			v1p8-supply	= <&pm8921_l4>;
> +
> +			resets		= <&gcc USB_HS1_RESET>;
> +			reset-names	= "link";
> +		};
> +
>  		usb3_phy:phy@12520000 {
>  			compatible	= "qcom,usb-otg-ci";
>  			reg		= <0x12520000 0x400>;
> @@ -334,6 +363,23 @@
>  			reset-names	= "link";
>  		};
>  
> +		gadget1:gadget@12500000 {
> +			compatible	= "qcom,ci-hdrc";
> +			reg		= <0x12500000 0x400>;
> +			status		= "disabled";
> +			dr_mode		= "peripheral";
> +			interrupts	= <0 100 0>;
> +			usb-phy		= <&usb1_phy>;
> +		};
> +
> +		usb1: usb@12500000 {
> +			compatible	= "qcom,ehci-host";
> +			reg		= <0x12500000 0x400>;
> +			interrupts	= <0 100 0>;
> +			status		= "disabled";
> +			usb-phy		= <&usb1_phy>;
> +		};
> +
>  		usb3: usb@12520000 {
>  			compatible	= "qcom,ehci-host";
>  			reg		= <0x12520000 0x400>;
> 

Re: [PATCH 3/4] ARM: DT: apq8064: Add USB OTG support

[Mark Rutland]

On Mon, Sep 29, 2014 at 11:26:41AM +0100, Kiran Padwal wrote:
> Hi Srinivas,
> 
> Some review are comments inline.
> 
> On Monday 29 September 2014 02:45 PM, Srinivas Kandagatla wrote:
> > This patch adds USB OTG support on USB1 of APQ8064 SOC.
> > Tested on IFC6410 with ethernet gadget.
> > 
> > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> > ---
> >  arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 14 +++++++++
> >  arch/arm/boot/dts/qcom-apq8064.dtsi        | 46 ++++++++++++++++++++++++++++++
> >  2 files changed, 60 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> > index d6036b8..f41fb39 100644
> > --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> > +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> > @@ -40,6 +40,11 @@
> >  			};
> >  		};
> >  
> > +		/* OTG */
> > +		usb1_phy:phy@12500000 {
> > +			status = "ok";
> 
> Its canonical value is "okay" (although in practice anything
> other than "disabled" should work).

That's not quite true, there are other "bad" values like "fail" and
"fail-sss" documented by ePAPR. In Linux, of_device_is_available errs on
the side of caution and checks for either "okay" or "ok", failing
otherwise

Regardless, please use the canonical "okay".

Mark.

Re: [PATCH 3/4] ARM: DT: apq8064: Add USB OTG support

[Srinivas Kandagatla]

On 29/09/14 11:53, Mark Rutland wrote:
>> >Its canonical value is "okay" (although in practice anything
>> >other than "disabled" should work).
> That's not quite true, there are other "bad" values like "fail" and
> "fail-sss" documented by ePAPR. In Linux, of_device_is_available errs on
> the side of caution and checks for either "okay" or "ok", failing
> otherwise
>
> Regardless, please use the canonical "okay".
I will fix this in v2.


--srini

[PATCH 4/4] ARM: DT: apq8064: Add SATA controller support.

[Srinivas Kandagatla]

This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 40 +++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 38d3efa..fa057b7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -274,6 +274,17 @@
 				regulator-always-on;
 			};
 
+			pm8921_s4: pm8921-s4 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS4>;
+
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				qcom,boot-load 		= <200000>;
+				qcom,switch-mode-frequency = <3200000>;
+				regulator-always-on;
+			};
+
 			pm8921_l3: pm8921-l3 {
 				compatible	= "qcom,rpm-pm8921-pldo";
 				reg		= <QCOM_RPM_PM8921_LDO3>;
@@ -396,6 +407,35 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0:sata-phy@1b400000{
+			compatible	= "qcom,apq8064-sata-phy";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names = "cfg";
+			#phy-cells = <0>;
+		};
+
+		sata0: sata@29000000 {
+			compatible	= "generic-ahci";
+			reg		= <0x29000000 0x180>;
+			interrupts	= <0 209 0>;
+			clocks = <&gcc SFAB_SATA_S_H_CLK>, <&gcc SATA_H_CLK>,
+				 <&gcc SATA_A_CLK>, <&gcc SATA_RXOOB_CLK>,
+				 <&gcc SATA_PMALIVE_CLK>;
+
+			clock-names = "slave_iface", "iface",
+				      "bus", "rxoob",
+				      "core_pmalive";
+			assigned-clocks = <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates = <100000000>, <100000000>;
+
+			phys  = <&sata_phy0>;
+			phy-names = "sata-phy";
+			target-supply = <&pm8921_s4>;
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

Re: [PATCH 4/4] ARM: DT: apq8064: Add SATA controller support.

[Stephen Boyd]

On 09/29/14 02:15, Srinivas Kandagatla wrote:
> @@ -396,6 +407,35 @@
>  			usb-phy		= <&usb4_phy>;
>  		};
>  
> +		sata_phy0:sata-phy@1b400000{

add some spaces here?

> +			compatible	= "qcom,apq8064-sata-phy";
> +			reg		= <0x1b400000 0x200>;
> +			reg-names	= "phy_mem";
> +			clocks		= <&gcc SATA_PHY_CFG_CLK>;
> +			clock-names = "cfg";
> +			#phy-cells = <0>;

These two lost the pretty tabs.

> +		};
> +
> +		sata0: sata@29000000 {
> +			compatible	= "generic-ahci";
> +			reg		= <0x29000000 0x180>;
> +			interrupts	= <0 209 0>;

Sorry I'm nitpicking but it annoys me. Either align it all or don't
align it.

> +			clocks = <&gcc SFAB_SATA_S_H_CLK>, <&gcc SATA_H_CLK>,
> +				 <&gcc SATA_A_CLK>, <&gcc SATA_RXOOB_CLK>,
> +				 <&gcc SATA_PMALIVE_CLK>;
> +
> +			clock-names = "slave_iface", "iface",
> +				      "bus", "rxoob",
> +				      "core_pmalive";
> +			assigned-clocks = <&gcc SATA_RXOOB_CLK>,
> +						<&gcc SATA_PMALIVE_CLK>;
> +			assigned-clock-rates = <100000000>, <100000000>;
> +
> +			phys  = <&sata_phy0>;
> +			phy-names = "sata-phy";
> +			target-supply = <&pm8921_s4>;
> +		};
> +
>  		/* Temporary fixed regulator */
>  		vsdcc_fixed: vsdcc-regulator {
>  			compatible = "regulator-fixed";


-- 
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hosted by The Linux Foundation

Re: [PATCH 4/4] ARM: DT: apq8064: Add SATA controller support.

[Srinivas Kandagatla]

On 29/09/14 23:20, Stephen Boyd wrote:
> On 09/29/14 02:15, Srinivas Kandagatla wrote:
>> @@ -396,6 +407,35 @@
>>   			usb-phy		= <&usb4_phy>;
>>   		};
>>
>> +		sata_phy0:sata-phy@1b400000{
>
> add some spaces here?
Will fix this in next version.
>
>> +			compatible	= "qcom,apq8064-sata-phy";
>> +			reg		= <0x1b400000 0x200>;
>> +			reg-names	= "phy_mem";
>> +			clocks		= <&gcc SATA_PHY_CFG_CLK>;
>> +			clock-names = "cfg";
>> +			#phy-cells = <0>;
>
> These two lost the pretty tabs.
>
Will fix this in next version.
>> +		};
>> +
>> +		sata0: sata@29000000 {
>> +			compatible	= "generic-ahci";
>> +			reg		= <0x29000000 0x180>;
>> +			interrupts	= <0 209 0>;
>
> Sorry I'm nitpicking but it annoys me. Either align it all or don't
> align it.
I Will fix this in next version.

thanks,
srini
>
>> +			clocks = <&gcc SFAB_SATA_S_H_CLK>, <&gcc SATA_H_CLK>,
>> +				 <&gcc SATA_A_CLK>, <&gcc SATA_RXOOB_CLK>,
>> +				 <&gcc SATA_PMALIVE_CLK>;
>> +
>> +			clock-names = "slave_iface", "iface",
>> +				      "bus", "rxoob",
>> +				      "core_pmalive";
>> +			assigned-clocks = <&gcc SATA_RXOOB_CLK>,
>> +						<&gcc SATA_PMALIVE_CLK>;
>> +			assigned-clock-rates = <100000000>, <100000000>;
>> +
>> +			phys  = <&sata_phy0>;
>> +			phy-names = "sata-phy";
>> +			target-supply = <&pm8921_s4>;
>> +		};
>> +
>>   		/* Temporary fixed regulator */
>>   		vsdcc_fixed: vsdcc-regulator {
>>   			compatible = "regulator-fixed";
>
>
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[PATCH v2 0/4] ARM: dts: apq8064 DT patches

[Srinivas Kandagatla]

These patches adds dt nodes for RPM, USB and SATA IPs found in APQ8064.
All the driver support for these IPs are already available in v3.17, except
the RPM driver which is now accepted by Lee and Mark.

These patches depend on the header file from 
http://www.spinics.net/lists/arm-kernel/msg364310.html
for regulators.

Now that the RPM patch is accepted, should RPM patch go via arm-soc tree?
so that we can get more functionality on IFC6410 board in v3.18 mainline.

All these patches are tested on IFC6410 board.
Am hoping to get these patches for v3.18, as these patches were sitting in
my dev tree since last 3 merge windows.

Changes since v1:
	- Updated with all the regulators in the rpm as suggested by Bjorn.
	- Fixed few indentations spotted by both Bjorn, Stephen and others.
	

Thanks,
srini


Srinivas Kandagatla (4):
  ARM: dts: apq8064: add RPM regulators support
  ARM: dts: apq8064: Add usb host support.
  ARM: dts: apq8064: Add USB OTG support
  ARM: dts: apq8064: Add SATA controller support.

 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  38 +++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 424 +++++++++++++++++++++++++++++
 2 files changed, 462 insertions(+)

-- 
1.9.1

[PATCH v2 1/4] ARM: dts: apq8064: add RPM regulators support

[Srinivas Kandagatla]

This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support. Also adds all the regulators in the rpm.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 297 ++++++++++++++++++++++++++++++++++++
 1 file changed, 297 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b3154c0..64708cb 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -3,6 +3,7 @@
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -246,6 +247,302 @@
 			#reset-cells = <1>;
 		};
 
+		l2cc: clock-controller@2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;
+		};
+
+		rpm@108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;
+
+			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
+			interrupt-names	= "ack", "err", "wakeup";
+
+			#address-cells	= <1>;
+			#size-cells	= <0>;
+
+			/* Buck SMPS */
+			pm8921_s1: pm8921-s1 {
+				compatible		= "qcom,rpm-pm8921-smps";
+				reg			= <QCOM_RPM_PM8921_SMPS1>;
+				regulator-min-microvolt	= <850000>;
+				regulator-max-microvolt	= <1300000>;
+			};
+
+			pm8921_s2: pm8921-s2 {
+				compatible		= "qcom,rpm-pm8921-smps";
+				reg			= <QCOM_RPM_PM8921_SMPS2>;
+				regulator-min-microvolt	= <1000000>;
+				regulator-max-microvolt	= <1400000>;
+			};
+
+			pm8921_s3: pm8921-s3 {
+				compatible			= "qcom,rpm-pm8921-smps";
+				reg				= <QCOM_RPM_PM8921_SMPS3>;
+				regulator-min-microvolt		= <1000000>;
+				regulator-max-microvolt		= <1400000>;
+				qcom,switch-mode-frequency	= <4800000>;
+			};
+
+			pm8921_s4: pm8921-s4 {
+				compatible			= "qcom,rpm-pm8921-smps";
+				reg				= <QCOM_RPM_PM8921_SMPS4>;
+				regulator-min-microvolt		= <1800000>;
+				regulator-max-microvolt		= <1800000>;
+				qcom,switch-mode-frequency	= <3200000>;
+			};
+
+			pm8921_s5: pm8921-s5 {
+				compatible		= "qcom,rpm-pm8921-smps";
+				reg			= <QCOM_RPM_PM8921_SMPS5>;
+				regulator-min-microvolt	= < 850000>;
+				regulator-max-microvolt	= <1300000>;
+			};
+
+			pm8921_s6: pm8921-s6 {
+				compatible		= "qcom,rpm-pm8921-smps";
+				reg			= <QCOM_RPM_PM8921_SMPS6>;
+				regulator-min-microvolt	= < 850000>;
+				regulator-max-microvolt	= <1300000>;
+			};
+
+			pm8921_s7: pm8921-s7 {
+				compatible		= "qcom,rpm-pm8921-smps";
+				reg			= <QCOM_RPM_PM8921_SMPS7>;
+				regulator-min-microvolt	= < 500000>;
+				regulator-max-microvolt	= <1350000>;
+			};
+
+			pm8921_s8: pm8921-s8 {
+				compatible		= "qcom,rpm-pm8921-smps";
+				reg			= <QCOM_RPM_PM8921_SMPS8>;
+				regulator-min-microvolt	= <1500000>;
+				regulator-max-microvolt	= <2350000>;
+			};
+
+			/* PMOS LDO */
+			pm8921_l1: pm8921-l1 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO1>;
+				regulator-min-microvolt	= <1000000>;
+				regulator-max-microvolt	= <1450000>;
+			};
+
+			pm8921_l2: pm8921-l2 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO2>;
+				regulator-min-microvolt	= <1200000>;
+				regulator-max-microvolt	= <1200000>;
+			};
+
+			pm8921_l3: pm8921-l3 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO3>;
+				regulator-min-microvolt = <3050000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			pm8921_l4: pm8921-l4 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO4>;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1800000>;
+			};
+
+			pm8921_l5: pm8921-l5 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO5>;
+				regulator-min-microvolt = <2750000>;
+				regulator-max-microvolt = <3000000>;
+			};
+
+			pm8921_l6: pm8921-l6 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO6>;
+				regulator-min-microvolt = <2750000>;
+				regulator-max-microvolt = <3000000>;
+			};
+
+			pm8921_l7: pm8921-l7 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO7>;
+				regulator-min-microvolt = <2750000>;
+				regulator-max-microvolt = <3000000>;
+			};
+
+			pm8921_l8: pm8921-l8 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO8>;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3000000>;
+			};
+
+			pm8921_l9: pm8921-l9 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO9>;
+				regulator-min-microvolt = <2600000>;
+				regulator-max-microvolt = <3000000>;
+			};
+
+			pm8921_l10: pm8921-l10 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO10>;
+				regulator-min-microvolt = <2600000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			pm8921_l11: pm8921-l11 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO11>;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			pm8921_l12: pm8921-l12 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO12>;
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1500000>;
+			};
+
+			pm8921_l14: pm8921-l14 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO14>;
+				regulator-min-microvolt = <1700000>;
+				regulator-max-microvolt = <1900000>;
+			};
+
+			pm8921_l15: pm8921-l15 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO15>;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			pm8921_l16: pm8921-l16 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO16>;
+				regulator-min-microvolt = <2600000>;
+				regulator-max-microvolt = <3000000>;
+			};
+
+			pm8921_l17: pm8921-l17 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO17>;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3600000>;
+			};
+
+			pm8921_l18: pm8921-l18 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO18>;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1500000>;
+			};
+
+			pm8921_l21: pm8921-l21 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO21>;
+				regulator-min-microvolt = <1700000>;
+				regulator-max-microvolt = <2100000>;
+			};
+
+			pm8921_l22: pm8921-l22 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO22>;
+				regulator-min-microvolt = <1700000>;
+				regulator-max-microvolt = <2850000>;
+			};
+
+			pm8921_l23: pm8921-l23 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO23>;
+				regulator-min-microvolt = <1700000>;
+				regulator-max-microvolt = <1900000>;
+			};
+
+			pm8921_l24: pm8921-l24 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO24>;
+				regulator-min-microvolt = <0750000>;
+				regulator-max-microvolt = <1250000>;
+			};
+
+			pm8921_l25: pm8921-l25 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO25>;
+				regulator-min-microvolt = <0750000>;
+				regulator-max-microvolt = <1250000>;
+			};
+
+			pm8921_l26: pm8921-l26 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO26>;
+				regulator-min-microvolt = <0750000>;
+				regulator-max-microvolt = <1250000>;
+			};
+
+			pm8921_l27: pm8921-l27 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO27>;
+				regulator-min-microvolt = <0750000>;
+				regulator-max-microvolt = <1250000>;
+			};
+
+			pm8921_l28: pm8921-l28 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO28>;
+				regulator-min-microvolt = <0750000>;
+				regulator-max-microvolt = <1500000>;
+			};
+
+			pm8921_l29: pm8921-l29 {
+				compatible		= "qcom,rpm-pm8921-pldo";
+				reg			= <QCOM_RPM_PM8921_LDO29>;
+				regulator-min-microvolt = <1700000>;
+				regulator-max-microvolt = <2200000>;
+			};
+
+			/* Low Voltage Switch */
+			pm8921_lvs1: pm8921-lvs1 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS1>;
+			};
+
+			pm8921_lvs2: pm8921-lvs2 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS2>;
+			};
+
+			pm8921_lvs3: pm8921-lvs3 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS3>;
+			};
+
+			pm8921_lvs4: pm8921-lvs4 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS4>;
+			};
+
+			pm8921_lvs5: pm8921-lvs5 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS5>;
+			};
+
+			pm8921_lvs6: pm8921-lvs6 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS6>;
+			};
+
+			pm8921_lvs7: pm8921-lvs7 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS7>;
+			};
+
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

Re: [PATCH v2 1/4] ARM: dts: apq8064: add RPM regulators support

[Bjorn Andersson]

On Tue 30 Sep 07:09 PDT 2014, Srinivas Kandagatla wrote:

> This patch adds rpm node to apq8064 dt as rpm would be used by other
> devices for regulator support. Also adds all the regulators in the rpm.
> 

Some comments on the compatibles, based on rpm-regulator-8960 msm-3.4.

After giving this some more thought I think it would be good to defer the
voltage definition to the dts files, at least for the ldos (as these are being
re-purposed).

That way the dts implementor will be the one frying their components and not us
because some default value kicking in because someone miss-spelled or forgot to
override a certain voltage.

> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  arch/arm/boot/dts/qcom-apq8064.dtsi | 297 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 297 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi

[..]

> +			pm8921_s5: pm8921-s5 {
> +				compatible		= "qcom,rpm-pm8921-smps";

qcom,rpm-pm8921-ftsmps

> +				reg			= <QCOM_RPM_PM8921_SMPS5>;
> +				regulator-min-microvolt	= < 850000>;
> +				regulator-max-microvolt	= <1300000>;
> +			};
> +
> +			pm8921_s6: pm8921-s6 {
> +				compatible		= "qcom,rpm-pm8921-smps";

qcom,rpm-pm8921-ftsmps

> +				reg			= <QCOM_RPM_PM8921_SMPS6>;
> +				regulator-min-microvolt	= < 850000>;
> +				regulator-max-microvolt	= <1300000>;
> +			};
> +
> +			pm8921_s7: pm8921-s7 {
> +				compatible		= "qcom,rpm-pm8921-smps";
> +				reg			= <QCOM_RPM_PM8921_SMPS7>;
> +				regulator-min-microvolt	= < 500000>;
> +				regulator-max-microvolt	= <1350000>;
> +			};
> +
> +			pm8921_s8: pm8921-s8 {
> +				compatible		= "qcom,rpm-pm8921-smps";
> +				reg			= <QCOM_RPM_PM8921_SMPS8>;
> +				regulator-min-microvolt	= <1500000>;
> +				regulator-max-microvolt	= <2350000>;
> +			};
> +
> +			/* PMOS LDO */
> +			pm8921_l1: pm8921-l1 {
> +				compatible		= "qcom,rpm-pm8921-pldo";

qcom,rpm-pm8921-nldo

> +				reg			= <QCOM_RPM_PM8921_LDO1>;
> +				regulator-min-microvolt	= <1000000>;
> +				regulator-max-microvolt	= <1450000>;
> +			};
> +
> +			pm8921_l2: pm8921-l2 {
> +				compatible		= "qcom,rpm-pm8921-pldo";

qcom,rpm-pm8921-nldo

> +				reg			= <QCOM_RPM_PM8921_LDO2>;
> +				regulator-min-microvolt	= <1200000>;
> +				regulator-max-microvolt	= <1200000>;
> +			};
> +

[..]

> +
> +			pm8921_l24: pm8921-l24 {
> +				compatible		= "qcom,rpm-pm8921-pldo";

qcom,rpm-pm8921-nldo1200

> +				reg			= <QCOM_RPM_PM8921_LDO24>;
> +				regulator-min-microvolt = <0750000>;
> +				regulator-max-microvolt = <1250000>;
> +			};
> +
> +			pm8921_l25: pm8921-l25 {
> +				compatible		= "qcom,rpm-pm8921-pldo";

qcom,rpm-pm8921-nldo1200

> +				reg			= <QCOM_RPM_PM8921_LDO25>;
> +				regulator-min-microvolt = <0750000>;
> +				regulator-max-microvolt = <1250000>;
> +			};
> +
> +			pm8921_l26: pm8921-l26 {
> +				compatible		= "qcom,rpm-pm8921-pldo";

qcom,rpm-pm8921-nldo1200

> +				reg			= <QCOM_RPM_PM8921_LDO26>;
> +				regulator-min-microvolt = <0750000>;
> +				regulator-max-microvolt = <1250000>;
> +			};
> +
> +			pm8921_l27: pm8921-l27 {
> +				compatible		= "qcom,rpm-pm8921-pldo";

qcom,rpm-pm8921-nldo1200

> +				reg			= <QCOM_RPM_PM8921_LDO27>;
> +				regulator-min-microvolt = <0750000>;
> +				regulator-max-microvolt = <1250000>;
> +			};
> +
> +			pm8921_l28: pm8921-l28 {
> +				compatible		= "qcom,rpm-pm8921-pldo";

qcom,rpm-pm8921-nldo1200

> +				reg			= <QCOM_RPM_PM8921_LDO28>;
> +				regulator-min-microvolt = <0750000>;
> +				regulator-max-microvolt = <1500000>;
> +			};
> +

[..]

> +

			pm8921_usb_switch: pm8921-usb-switch {
				compatible = "qcom,rpm-pm8921-switch";
				reg = <QCOM_RPM_USB_OTG_SWITCH>;
			};

			pm8921_hdmi_switch: pm8921-hdmi-switch {
				compatible = "qcom,rpm-pm8921-switch";
				reg = <QCOM_RPM_HDMI_SWITCH>;
			};

			pm8921_ncp: pm8921-ncp {
				compatible = "qcom,rpm-pm8921-ncp";
				reg = <QCOM_RPM_PM8921_NCP>;
			};
> +		};
> +
>  		/* Temporary fixed regulator */
>  		vsdcc_fixed: vsdcc-regulator {
>  			compatible = "regulator-fixed";
> -- 
> 1.9.1
> 

Re: [PATCH v2 1/4] ARM: dts: apq8064: add RPM regulators support

[Srinivas Kandagatla]

On 30/09/14 16:14, Bjorn Andersson wrote:
> On Tue 30 Sep 07:09 PDT 2014, Srinivas Kandagatla wrote:
>
>> This patch adds rpm node to apq8064 dt as rpm would be used by other
>> devices for regulator support. Also adds all the regulators in the rpm.
>>
>
> Some comments on the compatibles, based on rpm-regulator-8960 msm-3.4.
>
Thanks for the review. I kind of grabbed a table from datasheet, 
obviously my interpretation of some of them are wrong. I should have 
looked at rpm-regulator-8960.c.

I will fix them in next version.

> After giving this some more thought I think it would be good to defer the
> voltage definition to the dts files, at least for the ldos (as these are being
> re-purposed).
>
I agree with you.
> That way the dts implementor will be the one frying their components and not us
> because some default value kicking in because someone miss-spelled or forgot to
> override a certain voltage.
>
Yes.. I had the same feeling when I started adding this.. But I wanted 
to send it for review and see.

>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>>   arch/arm/boot/dts/qcom-apq8064.dtsi | 297 ++++++++++++++++++++++++++++++++++++
>>   1 file changed, 297 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
>
> [..]
>
>> +			pm8921_s5: pm8921-s5 {
>> +				compatible		= "qcom,rpm-pm8921-smps";
>
> qcom,rpm-pm8921-ftsmps
>
>> +				reg			= <QCOM_RPM_PM8921_SMPS5>;
>> +				regulator-min-microvolt	= < 850000>;
>> +				regulator-max-microvolt	= <1300000>;
>> +			};
>> +
>> +			pm8921_s6: pm8921-s6 {
>> +				compatible		= "qcom,rpm-pm8921-smps";
>
> qcom,rpm-pm8921-ftsmps
>
>> +				reg			= <QCOM_RPM_PM8921_SMPS6>;
>> +				regulator-min-microvolt	= < 850000>;
>> +				regulator-max-microvolt	= <1300000>;
>> +			};
>> +
>> +			pm8921_s7: pm8921-s7 {
>> +				compatible		= "qcom,rpm-pm8921-smps";
>> +				reg			= <QCOM_RPM_PM8921_SMPS7>;
>> +				regulator-min-microvolt	= < 500000>;
>> +				regulator-max-microvolt	= <1350000>;
>> +			};
>> +
>> +			pm8921_s8: pm8921-s8 {
>> +				compatible		= "qcom,rpm-pm8921-smps";
>> +				reg			= <QCOM_RPM_PM8921_SMPS8>;
>> +				regulator-min-microvolt	= <1500000>;
>> +				regulator-max-microvolt	= <2350000>;
>> +			};
>> +
>> +			/* PMOS LDO */
>> +			pm8921_l1: pm8921-l1 {
>> +				compatible		= "qcom,rpm-pm8921-pldo";
>
> qcom,rpm-pm8921-nldo
>
>> +				reg			= <QCOM_RPM_PM8921_LDO1>;
>> +				regulator-min-microvolt	= <1000000>;
>> +				regulator-max-microvolt	= <1450000>;
>> +			};
>> +
>> +			pm8921_l2: pm8921-l2 {
>> +				compatible		= "qcom,rpm-pm8921-pldo";
>
> qcom,rpm-pm8921-nldo
>
>> +				reg			= <QCOM_RPM_PM8921_LDO2>;
>> +				regulator-min-microvolt	= <1200000>;
>> +				regulator-max-microvolt	= <1200000>;
>> +			};
>> +
>
> [..]
>
>> +
>> +			pm8921_l24: pm8921-l24 {
>> +				compatible		= "qcom,rpm-pm8921-pldo";
>
> qcom,rpm-pm8921-nldo1200
>
>> +				reg			= <QCOM_RPM_PM8921_LDO24>;
>> +				regulator-min-microvolt = <0750000>;
>> +				regulator-max-microvolt = <1250000>;
>> +			};
>> +
>> +			pm8921_l25: pm8921-l25 {
>> +				compatible		= "qcom,rpm-pm8921-pldo";
>
> qcom,rpm-pm8921-nldo1200
>
>> +				reg			= <QCOM_RPM_PM8921_LDO25>;
>> +				regulator-min-microvolt = <0750000>;
>> +				regulator-max-microvolt = <1250000>;
>> +			};
>> +
>> +			pm8921_l26: pm8921-l26 {
>> +				compatible		= "qcom,rpm-pm8921-pldo";
>
> qcom,rpm-pm8921-nldo1200
>
>> +				reg			= <QCOM_RPM_PM8921_LDO26>;
>> +				regulator-min-microvolt = <0750000>;
>> +				regulator-max-microvolt = <1250000>;
>> +			};
>> +
>> +			pm8921_l27: pm8921-l27 {
>> +				compatible		= "qcom,rpm-pm8921-pldo";
>
> qcom,rpm-pm8921-nldo1200
>
>> +				reg			= <QCOM_RPM_PM8921_LDO27>;
>> +				regulator-min-microvolt = <0750000>;
>> +				regulator-max-microvolt = <1250000>;
>> +			};
>> +
>> +			pm8921_l28: pm8921-l28 {
>> +				compatible		= "qcom,rpm-pm8921-pldo";
>
> qcom,rpm-pm8921-nldo1200
>
>> +				reg			= <QCOM_RPM_PM8921_LDO28>;
>> +				regulator-min-microvolt = <0750000>;
>> +				regulator-max-microvolt = <1500000>;
>> +			};
>> +
>
> [..]
>
>> +
>
> 			pm8921_usb_switch: pm8921-usb-switch {
> 				compatible = "qcom,rpm-pm8921-switch";
> 				reg = <QCOM_RPM_USB_OTG_SWITCH>;
> 			};
>
> 			pm8921_hdmi_switch: pm8921-hdmi-switch {
> 				compatible = "qcom,rpm-pm8921-switch";
> 				reg = <QCOM_RPM_HDMI_SWITCH>;
> 			};
>
> 			pm8921_ncp: pm8921-ncp {
> 				compatible = "qcom,rpm-pm8921-ncp";
> 				reg = <QCOM_RPM_PM8921_NCP>;
> 			};
>> +		};
>> +
>>   		/* Temporary fixed regulator */
>>   		vsdcc_fixed: vsdcc-regulator {
>>   			compatible = "regulator-fixed";
>> --
>> 1.9.1
>>

[PATCH v2 2/4] ARM: dts: apq8064: Add usb host support.

[Srinivas Kandagatla]

This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 16 +++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 55 ++++++++++++++++++++++++++++++
 2 files changed, 71 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index b396c83..3288bf7 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -40,6 +40,22 @@
 			};
 		};
 
+		usb3_phy: phy@12520000 {
+			status = "okay";
+		};
+
+		usb4_phy: phy@12530000 {
+			status = "okay";
+		};
+
+		usb3: usb@12520000 {
+			status = "okay";
+		};
+
+		usb4: usb@12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc@12400000 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 64708cb..b2dd549 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -2,6 +2,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
 #include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
@@ -543,6 +544,60 @@
 
 		};
 
+		usb3_phy:phy@12520000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS3_XCVR_CLK>,
+					  <&gcc USB_HS3_H_CLK>;
+			clock-names	= "core", "iface";
+
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+
+			resets		= <&gcc USB_HS3_RESET>;
+			reset-names	= "link";
+		};
+
+		usb4_phy:phy@12530000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS4_XCVR_CLK>,
+					  <&gcc USB_HS4_H_CLK>;
+			clock-names	= "core", "iface";
+
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+
+			resets		= <&gcc USB_HS4_RESET>;
+			reset-names	= "link";
+		};
+
+		usb3: usb@12520000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb3_phy>;
+		};
+
+		usb4: usb@12530000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb4_phy>;
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

[PATCH v2 3/4] ARM: dts: apq8064: Add USB OTG support

[Srinivas Kandagatla]

This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 14 ++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 36 ++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 3288bf7..f221e9e 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -40,6 +40,11 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy: phy@12500000 {
+			status = "okay";
+		};
+
 		usb3_phy: phy@12520000 {
 			status = "okay";
 		};
@@ -48,6 +53,15 @@
 			status = "okay";
 		};
 
+		gadget1: gadget@12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb@12500000 {
+			status = "okay";
+		};
+
 		usb3: usb@12520000 {
 			status = "okay";
 		};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b2dd549..28643fb 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -544,6 +544,25 @@
 
 		};
 
+		usb1_phy:phy@12500000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS1_XCVR_CLK>,
+					  <&gcc USB_HS1_H_CLK>;
+			clock-names	= "core", "iface";
+
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+
+			resets		= <&gcc USB_HS1_RESET>;
+			reset-names	= "link";
+		};
+
 		usb3_phy:phy@12520000 {
 			compatible	= "qcom,usb-otg-ci";
 			reg		= <0x12520000 0x400>;
@@ -582,6 +601,23 @@
 			reset-names	= "link";
 		};
 
+		gadget1:gadget@12500000 {
+			compatible	= "qcom,ci-hdrc";
+			reg		= <0x12500000 0x400>;
+			status		= "disabled";
+			dr_mode		= "peripheral";
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			usb-phy		= <&usb1_phy>;
+		};
+
+		usb1: usb@12500000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb1_phy>;
+		};
+
 		usb3: usb@12520000 {
 			compatible	= "qcom,ehci-host";
 			reg		= <0x12520000 0x400>;
-- 
1.9.1

[PATCH v2 4/4] ARM: dts: apq8064: Add SATA controller support.

[Srinivas Kandagatla]

This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  8 +++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 36 ++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index f221e9e..446dab9 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -40,6 +40,14 @@
 			};
 		};
 
+		sata_phy0: sata-phy@1b400000{
+			status = "okay";
+		};
+
+		sata0: sata@29000000 {
+			status = "okay";
+		};
+
 		/* OTG */
 		usb1_phy: phy@12500000 {
 			status = "okay";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 28643fb..44b6a0a 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -634,6 +634,42 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0: sata-phy@1b400000{
+			compatible	= "qcom,apq8064-sata-phy";
+			status		= "disabled";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names	= "cfg";
+			#phy-cells	= <0>;
+		};
+
+		sata0: sata@29000000 {
+			compatible		= "generic-ahci";
+			status			= "disabled";
+			reg			= <0x29000000 0x180>;
+			interrupts		= <0 209 0>;
+
+			clocks			= <&gcc SFAB_SATA_S_H_CLK>,
+						<&gcc SATA_H_CLK>,
+				 	  	<&gcc SATA_A_CLK>,
+						<&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			clock-names 		= "slave_iface",
+						"iface",
+						"bus",
+						"rxoob",
+						"core_pmalive";
+
+			assigned-clocks		= <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates	= <100000000>, <100000000>;
+
+			phys			= <&sata_phy0>;
+			phy-names		= "sata-phy";
+			target-supply		= <&pm8921_s4>;
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

Re: [PATCH v2 0/4] ARM: dts: apq8064 DT patches

[Kevin Hilman]

Srinivas Kandagatla <srinivas.kandagatla@linaro.org> writes:

> These patches adds dt nodes for RPM, USB and SATA IPs found in APQ8064.
> All the driver support for these IPs are already available in v3.17, except
> the RPM driver which is now accepted by Lee and Mark.
>
> These patches depend on the header file from 
> http://www.spinics.net/lists/arm-kernel/msg364310.html
> for regulators.
>
> Now that the RPM patch is accepted, should RPM patch go via arm-soc tree?
> so that we can get more functionality on IFC6410 board in v3.18 mainline.
>
> All these patches are tested on IFC6410 board.
> Am hoping to get these patches for v3.18, as these patches were sitting in
> my dev tree since last 3 merge windows.

A nit on process, for future reference:

You only need to send to arm@kernel.org if you're expecting the arm-soc
maintainers to directly apply the patches or pull request.

In this case, it seems like stuff that the qcom maintainers will queue
up in their DT branch, and then submit to arm-soc maintainers.

Kevin

[PATCH v3 0/4] ARM: dts: apq8064 DT patches

[Srinivas Kandagatla]

These patches adds dt nodes for RPM, USB and SATA IPs found in APQ8064.
All the driver support for these IPs are already available in v3.17, except
the RPM driver which is now accepted by Lee and Mark.

These patches depend on the header file from 
http://www.spinics.net/lists/arm-kernel/msg364310.html
for regulators.

Now that the RPM patch is accepted, should RPM patch go via arm-soc tree?
so that we can get more functionality on IFC6410 board in v3.18 mainline.

All these patches are tested on IFC6410 board.
Am hoping to get these patches for v3.18, as these patches were sitting in
my dev tree since last 3 merge windows.


Changes since v2:
	- Bjorn added 4 missing MVS regulators.
	- fixed few compatible strings spotted by Bjorn.
	- Moved the voltage specifics to dts file as discussed with Bjorn.

Changes since v1:
	- Updated with all the regulators in the rpm as suggested by Bjorn.
	- Fixed few indentations spotted by both Bjorn, Stephen and others.
	

Thanks,
srini


Srinivas Kandagatla (4):
  ARM: dts: apq8064: add RPM regulators support
  ARM: dts: apq8064: Add usb host support.
  ARM: dts: apq8064: Add USB OTG support
  ARM: dts: apq8064: Add SATA controller support.

 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  77 +++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 355 +++++++++++++++++++++++++++++
 2 files changed, 432 insertions(+)

-- 
1.9.1

[PATCH v3 1/4] ARM: dts: apq8064: add RPM regulators support

[Srinivas Kandagatla]

This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support. Also adds all the regulators in the rpm.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 241 ++++++++++++++++++++++++++++++++++++
 1 file changed, 241 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b3154c0..db5fc59 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -3,6 +3,7 @@
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -246,6 +247,246 @@
 			#reset-cells = <1>;
 		};
 
+		l2cc: clock-controller@2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;
+		};
+
+		rpm@108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;
+
+			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
+			interrupt-names	= "ack", "err", "wakeup";
+
+			#address-cells	= <1>;
+			#size-cells	= <0>;
+
+			/* Buck SMPS */
+			pm8921_s1: pm8921-s1 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS1>;
+			};
+
+			pm8921_s2: pm8921-s2 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS2>;
+			};
+
+			pm8921_s3: pm8921-s3 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS3>;
+			};
+
+			pm8921_s4: pm8921-s4 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS4>;
+			};
+
+			pm8921_s5: pm8921-s5 {
+				compatible	= "qcom,rpm-pm8921-ftsmps";
+				reg		= <QCOM_RPM_PM8921_SMPS5>;
+			};
+
+			pm8921_s6: pm8921-s6 {
+				compatible	= "qcom,rpm-pm8921-ftsmps";
+				reg		= <QCOM_RPM_PM8921_SMPS6>;
+			};
+
+			pm8921_s7: pm8921-s7 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS7>;
+			};
+
+			pm8921_s8: pm8921-s8 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS8>;
+			};
+
+			/* PMOS LDO */
+			pm8921_l1: pm8921-l1 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO1>;
+			};
+
+			pm8921_l2: pm8921-l2 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO2>;
+			};
+
+			pm8921_l3: pm8921-l3 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO3>;
+			};
+
+			pm8921_l4: pm8921-l4 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO4>;
+			};
+
+			pm8921_l5: pm8921-l5 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO5>;
+			};
+
+			pm8921_l6: pm8921-l6 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO6>;
+			};
+
+			pm8921_l7: pm8921-l7 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO7>;
+			};
+
+			pm8921_l8: pm8921-l8 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO8>;
+			};
+
+			pm8921_l9: pm8921-l9 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO9>;
+			};
+
+			pm8921_l10: pm8921-l10 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO10>;
+			};
+
+			pm8921_l11: pm8921-l11 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO11>;
+			};
+
+			pm8921_l12: pm8921-l12 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO12>;
+			};
+
+			pm8921_l14: pm8921-l14 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO14>;
+			};
+
+			pm8921_l15: pm8921-l15 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO15>;
+			};
+
+			pm8921_l16: pm8921-l16 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO16>;
+			};
+
+			pm8921_l17: pm8921-l17 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO17>;
+			};
+
+			pm8921_l18: pm8921-l18 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO18>;
+			};
+
+			pm8921_l21: pm8921-l21 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO21>;
+			};
+
+			pm8921_l22: pm8921-l22 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO22>;
+			};
+
+			pm8921_l23: pm8921-l23 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO23>;
+			};
+
+			pm8921_l24: pm8921-l24 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO24>;
+			};
+
+			pm8921_l25: pm8921-l25 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO25>;
+			};
+
+			pm8921_l26: pm8921-l26 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO26>;
+			};
+
+			pm8921_l27: pm8921-l27 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO27>;
+			};
+
+			pm8921_l28: pm8921-l28 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO28>;
+			};
+
+			pm8921_l29: pm8921-l29 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO29>;
+			};
+
+			/* Low Voltage Switch */
+			pm8921_lvs1: pm8921-lvs1 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS1>;
+			};
+
+			pm8921_lvs2: pm8921-lvs2 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS2>;
+			};
+
+			pm8921_lvs3: pm8921-lvs3 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS3>;
+			};
+
+			pm8921_lvs4: pm8921-lvs4 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS4>;
+			};
+
+			pm8921_lvs5: pm8921-lvs5 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS5>;
+			};
+
+			pm8921_lvs6: pm8921-lvs6 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS6>;
+			};
+
+			pm8921_lvs7: pm8921-lvs7 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS7>;
+			};
+
+			pm8921_usb_switch: pm8921-usb-switch {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_USB_OTG_SWITCH>;
+			};
+
+			pm8921_hdmi_switch: pm8921-hdmi-switch {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_HDMI_SWITCH>;
+			};
+
+			pm8921_ncp: pm8921-ncp {
+				compatible	= "qcom,rpm-pm8921-ncp";
+				reg		= <QCOM_RPM_PM8921_NCP>;
+			};
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

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[PATCH v3 4/4] ARM: dts: apq8064: Add SATA controller support.

[Srinivas Kandagatla]

This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 15 +++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 35 ++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 3e2c777..6856c9d 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -47,6 +47,12 @@
 				qcom,switch-mode-frequency	= <4800000>;
 			};
 
+			pm8921_s4: pm8921-s4 {
+				regulator-min-microvolt		= <1800000>;
+				regulator-max-microvolt		= <1800000>;
+				qcom,switch-mode-frequency	= <3200000>;
+			};
+
 			pm8921_l3: pm8921-l3 {
 				regulator-min-microvolt = <3050000>;
 				regulator-max-microvolt = <3300000>;
@@ -63,6 +69,15 @@
 			};
 		};
 
+		sata_phy0: sata-phy@1b400000{
+			status = "okay";
+		};
+
+		sata0: sata@29000000 {
+			status		= "okay";
+			target-supply	= <&pm8921_s4>;
+		};
+
 		/* OTG */
 		usb1_phy: phy@12500000 {
 			status		= "okay";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index c251c72..e65aff0 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -566,6 +566,41 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0: sata-phy@1b400000{
+			compatible	= "qcom,apq8064-sata-phy";
+			status		= "disabled";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names	= "cfg";
+			#phy-cells	= <0>;
+		};
+
+		sata0: sata@29000000 {
+			compatible		= "generic-ahci";
+			status			= "disabled";
+			reg			= <0x29000000 0x180>;
+			interrupts		= <0 209 0>;
+
+			clocks			= <&gcc SFAB_SATA_S_H_CLK>,
+						<&gcc SATA_H_CLK>,
+						<&gcc SATA_A_CLK>,
+						<&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			clock-names		= "slave_iface",
+						"iface",
+						"bus",
+						"rxoob",
+						"core_pmalive";
+
+			assigned-clocks		= <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates	= <100000000>, <100000000>;
+
+			phys			= <&sata_phy0>;
+			phy-names		= "sata-phy";
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

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[PATCH v3 2/4] ARM: dts: apq8064: Add usb host support.

[Srinivas Kandagatla]

This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 40 +++++++++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 47 ++++++++++++++++++++++++++++++
 2 files changed, 87 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index b396c83..96c7b2c 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -40,6 +40,46 @@
 			};
 		};
 
+		rpm@108000 {
+			pm8921_s3: pm8921-s3 {
+				regulator-min-microvolt		= <1000000>;
+				regulator-max-microvolt		= <1400000>;
+				qcom,switch-mode-frequency	= <4800000>;
+			};
+
+			pm8921_l3: pm8921-l3 {
+				regulator-min-microvolt = <3050000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			pm8921_l23: pm8921-l23 {
+				regulator-min-microvolt = <1700000>;
+				regulator-max-microvolt = <1900000>;
+			};
+		};
+
+		usb3_phy: phy@12520000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb4_phy: phy@12530000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb3: usb@12520000 {
+			status = "okay";
+		};
+
+		usb4: usb@12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc@12400000 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index db5fc59..e33eb03 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -2,6 +2,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
 #include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
@@ -487,6 +488,52 @@
 			};
 		};
 
+		usb3_phy: phy@12520000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS3_XCVR_CLK>,
+					  <&gcc USB_HS3_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS3_RESET>;
+			reset-names	= "link";
+		};
+
+		usb4_phy: phy@12530000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS4_XCVR_CLK>,
+					  <&gcc USB_HS4_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS4_RESET>;
+			reset-names	= "link";
+		};
+
+		usb3: usb@12520000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb3_phy>;
+		};
+
+		usb4: usb@12530000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb4_phy>;
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

[PATCH v3 3/4] ARM: dts: apq8064: Add USB OTG support

[Srinivas Kandagatla]

This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 32 ++++++++++++++++++++++++++++++
 2 files changed, 54 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 96c7b2c..3e2c777 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -52,12 +52,25 @@
 				regulator-max-microvolt = <3300000>;
 			};
 
+			pm8921_l4: pm8921-l4 {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1800000>;
+			};
+
 			pm8921_l23: pm8921-l23 {
 				regulator-min-microvolt = <1700000>;
 				regulator-max-microvolt = <1900000>;
 			};
 		};
 
+		/* OTG */
+		usb1_phy: phy@12500000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
 		usb3_phy: phy@12520000 {
 			status		= "okay";
 			vddcx-supply	= <&pm8921_s3>;
@@ -72,6 +85,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1: gadget@12500000 {
+			status = "okay";
+		};
+
+		/* OTG */
+		usb1: usb@12500000 {
+			status = "okay";
+		};
+
 		usb3: usb@12520000 {
 			status = "okay";
 		};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index e33eb03..c251c72 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -488,6 +488,21 @@
 			};
 		};
 
+		usb1_phy: phy@12500000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS1_XCVR_CLK>,
+					  <&gcc USB_HS1_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS1_RESET>;
+			reset-names	= "link";
+		};
+
 		usb3_phy: phy@12520000 {
 			compatible	= "qcom,usb-otg-ci";
 			reg		= <0x12520000 0x400>;
@@ -518,6 +533,23 @@
 			reset-names	= "link";
 		};
 
+		gadget1: gadget@12500000 {
+			compatible	= "qcom,ci-hdrc";
+			reg		= <0x12500000 0x400>;
+			status		= "disabled";
+			dr_mode		= "peripheral";
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			usb-phy		= <&usb1_phy>;
+		};
+
+		usb1: usb@12500000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb1_phy>;
+		};
+
 		usb3: usb@12520000 {
 			compatible	= "qcom,ehci-host";
 			reg		= <0x12520000 0x400>;
-- 
1.9.1