From: Zhao Qiang <B45475@freescale.com>
To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org,
B07421@freescale.com
Cc: Zhao Qiang <B45475@freescale.com>, R63061@freescale.com
Subject: [PATCH 2/3] ls1021aqds: add qe node to ls1021aqds dts
Date: Wed, 22 Oct 2014 13:07:02 +0800 [thread overview]
Message-ID: <1413954422-13044-1-git-send-email-B45475@freescale.com> (raw)
add qe node(qe-tdm and qe-uart) into ls1021a-qds.dts
Signed-off-by: Zhao Qiang <B45475@freescale.com>
---
arch/arm/boot/dts/ls1021a-qds.dts | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
index e24a5bc..4231daa 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -308,6 +308,30 @@
};
};
+&uqe {
+ tdma: ucc@2000 {
+ compatible = "fsl,ucc-tdm";
+ rx-clock-name = "brg1";
+ tx-clock-name = "brg1";
+ fsl,rx-sync-clock = "none";
+ fsl,tx-sync-clock = "none";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "internal-loopback";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ };
+
+ serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+};
+
&pwm3 {
status = "okay";
};
--
2.1.0.27.g96db324
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