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From: Kevin Cernekee <cernekee@gmail.com>
To: arnd@arndb.de, f.fainelli@gmail.com, tglx@linutronix.de,
	jason@lakedaemon.net, ralf@linux-mips.org
Cc: linux-sh@vger.kernel.org, sergei.shtylyov@cogentembedded.com,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	mbizon@freebox.fr, jogo@openwrt.org, linux-mips@linux-mips.org
Subject: [PATCH V3 08/14] irqchip: bcm7120-l2: Make sure all register accesses use base+offset
Date: Sat,  1 Nov 2014 18:03:55 -0700	[thread overview]
Message-ID: <1414890241-9938-9-git-send-email-cernekee@gmail.com> (raw)
In-Reply-To: <1414890241-9938-1-git-send-email-cernekee@gmail.com>

A couple of accesses to IRQEN (base+0x00) just used "base" directly, so
they would break if IRQEN ever became nonzero.  Make sure that all
reads/writes specify the register offset constant.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/irqchip/irq-bcm7120-l2.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index 7086fe0..22d3fa1 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -66,10 +66,10 @@ static void bcm7120_l2_intc_suspend(struct irq_data *d)
 
 	irq_gc_lock(gc);
 	/* Save the current mask and the interrupt forward mask */
-	b->saved_mask = __raw_readl(b->base) | b->irq_fwd_mask;
+	b->saved_mask = __raw_readl(b->base + IRQEN) | b->irq_fwd_mask;
 	if (b->can_wake) {
 		reg = b->saved_mask | gc->wake_active;
-		__raw_writel(reg, b->base);
+		__raw_writel(reg, b->base + IRQEN);
 	}
 	irq_gc_unlock(gc);
 }
@@ -81,7 +81,7 @@ static void bcm7120_l2_intc_resume(struct irq_data *d)
 
 	/* Restore the saved mask */
 	irq_gc_lock(gc);
-	__raw_writel(b->saved_mask, b->base);
+	__raw_writel(b->saved_mask, b->base + IRQEN);
 	irq_gc_unlock(gc);
 }
 
-- 
2.1.1


  parent reply	other threads:[~2014-11-02  1:03 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-02  1:03 [PATCH V3 00/14] genirq endian fixes; bcm7120/brcmstb IRQ updates Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 01/14] sh: Eliminate unused irq_reg_{readl,writel} accessors Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 02/14] genirq: Generic chip: Change irq_reg_{readl,writel} arguments Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 03/14] genirq: Generic chip: Allow irqchip drivers to override irq_reg_{readl,writel} Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 04/14] genirq: Generic chip: Add big endian I/O accessors Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 05/14] irqchip: brcmstb-l2: Eliminate dependency on ARM code Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 06/14] irqchip: bcm7120-l2: Eliminate bad IRQ check Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 07/14] irqchip: bcm7120-l2, brcmstb-l2: Remove ARM Kconfig dependency Kevin Cernekee
2014-11-02  1:03 ` Kevin Cernekee [this message]
2014-11-02  1:03 ` [PATCH V3 09/14] irqchip: bcm7120-l2: Fix missing nibble in gc->unused mask Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 10/14] irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functions Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 11/14] irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers Kevin Cernekee
2014-11-02  1:03 ` [PATCH V3 12/14] irqchip: bcm7120-l2: Decouple driver from brcmstb-l2 Kevin Cernekee
2014-11-02  1:04 ` [PATCH V3 13/14] irqchip: bcm7120-l2: Convert driver to use irq_reg_{readl,writel} Kevin Cernekee
2014-11-02  1:04 ` [PATCH V3 14/14] irqchip: brcmstb-l2: " Kevin Cernekee
2014-11-03 11:56 ` [PATCH V3 00/14] genirq endian fixes; bcm7120/brcmstb IRQ updates Arnd Bergmann
2014-11-03 20:18   ` Thomas Gleixner
2014-11-04  8:18     ` Arnd Bergmann
2014-11-07  5:00 ` Jason Cooper

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