From: "Andreas Färber" <afaerber@suse.de>
To: Michal Simek <michal.simek@xilinx.com>
Cc: "Olof Johansson" <olof@lixom.net>,
"Sören Brinkmann" <soren.brinkmann@xilinx.com>,
linux-arm-kernel@lists.infradead.org,
"Andreas Olofsson" <andreas@adapteva.com>,
"Matteo Vit" <matteo.vit@starwaredesign.com>,
"Sean Rickerd" <srickerd@suse.com>,
"Andreas Färber" <afaerber@suse.de>,
stable@vger.kernel.org, "Rob Herring" <robh+dt@kernel.org>,
"Pawel Moll" <pawel.moll@arm.com>,
"Mark Rutland" <mark.rutland@arm.com>,
"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
"Kumar Gala" <galak@codeaurora.org>,
"Russell King" <linux@arm.linux.org.uk>,
"open list:OPEN FIRMWARE AND..." <devicetree@vger.kernel.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: [PATCH] ARM: dts: zynq: Enable PL clocks for Parallella
Date: Thu, 6 Nov 2014 18:22:10 +0100 [thread overview]
Message-ID: <1415294531-8942-1-git-send-email-afaerber@suse.de> (raw)
The Parallella board comes with a U-Boot bootloader that loads one of
two predefined FPGA bitstreams before booting the kernel. Both define an
AXI interface to the on-board Epiphany processor.
Enable clocks FCLK0..FCLK3 for the Programmable Logic by default.
Otherwise accessing, e.g., the ESYSRESET register freezes the board,
as seen with the Epiphany SDK tools e-reset and e-hw-rev, using /dev/mem.
Cc: <stable@vger.kernel.org> # 3.17.x
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
Michal/Olof, please consider this trivial patch as a fix for 3.18.
arch/arm/boot/dts/zynq-parallella.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-parallella.dts b/arch/arm/boot/dts/zynq-parallella.dts
index e1f51ca127fe..0429bbd89fba 100644
--- a/arch/arm/boot/dts/zynq-parallella.dts
+++ b/arch/arm/boot/dts/zynq-parallella.dts
@@ -34,6 +34,10 @@
};
};
+&clkc {
+ fclk-enable = <0xf>;
+};
+
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
--
2.1.2
next reply other threads:[~2014-11-06 17:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-06 17:22 Andreas Färber [this message]
2014-11-06 17:33 ` [PATCH] ARM: dts: zynq: Enable PL clocks for Parallella Sören Brinkmann
2014-11-06 18:34 ` Andreas Färber
2014-11-07 6:44 ` Michal Simek
[not found] ` <eca8ae5de8184151b03d3fd8d23c62a7-neA4ZlFjCT2P1V7ZRuPZVmYJ4DzVTqeXkX/xN29GLwg@public.gmane.org>
2014-11-09 0:58 ` Olof Johansson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1415294531-8942-1-git-send-email-afaerber@suse.de \
--to=afaerber@suse.de \
--cc=andreas@adapteva.com \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=ijc+devicetree@hellion.org.uk \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=mark.rutland@arm.com \
--cc=matteo.vit@starwaredesign.com \
--cc=michal.simek@xilinx.com \
--cc=olof@lixom.net \
--cc=pawel.moll@arm.com \
--cc=robh+dt@kernel.org \
--cc=soren.brinkmann@xilinx.com \
--cc=srickerd@suse.com \
--cc=stable@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).