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From: Kevin Cernekee <cernekee@gmail.com>
To: tglx@linutronix.de, jason@lakedaemon.net, linux-sh@vger.kernel.org
Cc: arnd@arndb.de, f.fainelli@gmail.com, ralf@linux-mips.org,
	sergei.shtylyov@cogentembedded.com, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, mbizon@freebox.fr, jogo@openwrt.org,
	linux-mips@linux-mips.org
Subject: [PATCH V4 03/14] genirq: Generic chip: Allow irqchip drivers to override irq_reg_{readl,writel}
Date: Thu,  6 Nov 2014 22:44:18 -0800	[thread overview]
Message-ID: <1415342669-30640-4-git-send-email-cernekee@gmail.com> (raw)
In-Reply-To: <1415342669-30640-1-git-send-email-cernekee@gmail.com>

Currently, these I/O accessors always assume little endian 32-bit
registers (readl/writel).  On some systems the IRQ registers need to be
accessed in BE mode or using 16-bit loads/stores, so we will provide a
way to override the default behavior.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
 include/linux/irq.h | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/include/linux/irq.h b/include/linux/irq.h
index ed1135d..0fecd95 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -686,6 +686,8 @@ struct irq_chip_type {
  * struct irq_chip_generic - Generic irq chip data structure
  * @lock:		Lock to protect register and cache data access
  * @reg_base:		Register base address (virtual)
+ * @reg_readl:		Alternate I/O accessor (defaults to readl if NULL)
+ * @reg_writel:		Alternate I/O accessor (defaults to writel if NULL)
  * @irq_base:		Interrupt base nr for this chip
  * @irq_cnt:		Number of interrupts handled by this chip
  * @mask_cache:		Cached mask register shared between all chip types
@@ -710,6 +712,8 @@ struct irq_chip_type {
 struct irq_chip_generic {
 	raw_spinlock_t		lock;
 	void __iomem		*reg_base;
+	u32			(*reg_readl)(void __iomem *addr);
+	void			(*reg_writel)(u32 val, void __iomem *addr);
 	unsigned int		irq_base;
 	unsigned int		irq_cnt;
 	u32			mask_cache;
@@ -818,13 +822,19 @@ static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
 static inline void irq_reg_writel(struct irq_chip_generic *gc,
 				  u32 val, int reg_offset)
 {
-	writel(val, gc->reg_base + reg_offset);
+	if (gc->reg_writel)
+		gc->reg_writel(val, gc->reg_base + reg_offset);
+	else
+		writel(val, gc->reg_base + reg_offset);
 }
 
 static inline u32 irq_reg_readl(struct irq_chip_generic *gc,
 				int reg_offset)
 {
-	return readl(gc->reg_base + reg_offset);
+	if (gc->reg_readl)
+		return gc->reg_readl(gc->reg_base + reg_offset);
+	else
+		return readl(gc->reg_base + reg_offset);
 }
 
 #endif /* _LINUX_IRQ_H */
-- 
2.1.1

  parent reply	other threads:[~2014-11-07  6:44 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-07  6:44 [PATCH V4 00/14] genirq endian fixes; bcm7120/brcmstb IRQ updates Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 01/14] sh: Eliminate unused irq_reg_{readl,writel} accessors Kevin Cernekee
2014-11-10  8:13   ` Geert Uytterhoeven
2014-11-14 16:38     ` Ralf Baechle
2014-11-14 17:05       ` Jason Cooper
2014-11-16  9:34         ` Geert Uytterhoeven
2015-01-19 19:13           ` Geert Uytterhoeven
2015-01-24 17:51             ` Thomas Gleixner
2015-01-25 10:13               ` Geert Uytterhoeven
2014-11-07  6:44 ` [PATCH V4 02/14] genirq: Generic chip: Change irq_reg_{readl,writel} arguments Kevin Cernekee
2014-11-07  6:44 ` Kevin Cernekee [this message]
2014-11-07  6:44 ` [PATCH V4 04/14] genirq: Generic chip: Add big endian I/O accessors Kevin Cernekee
2014-11-10 22:00   ` Kevin Hilman
2014-11-10 22:11     ` Kevin Cernekee
2014-11-10 23:03       ` Alexandre Belloni
2014-11-11 10:03         ` Boris Brezillon
2014-11-11 13:33         ` [PATCH] irqchip: atmel-aic: fix irqdomain initialization Boris Brezillon
2014-11-11 15:45           ` Kevin Hilman
2014-11-11 22:58           ` Jason Cooper
     [not found]             ` <20141111225800.GE3698-u4khhh1J0LxI1Ri9qeTfzeTW4wlIGRCZ@public.gmane.org>
2014-11-12  9:43               ` Boris Brezillon
2014-11-07  6:44 ` [PATCH V4 05/14] irqchip: brcmstb-l2: Eliminate dependency on ARM code Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 06/14] irqchip: bcm7120-l2: Eliminate bad IRQ check Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 07/14] irqchip: bcm7120-l2, brcmstb-l2: Remove ARM Kconfig dependency Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 08/14] irqchip: bcm7120-l2: Make sure all register accesses use base+offset Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 09/14] irqchip: bcm7120-l2: Fix missing nibble in gc->unused mask Kevin Cernekee
     [not found] ` <1415342669-30640-1-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-11-07  6:44   ` [PATCH V4 10/14] irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functions Kevin Cernekee
2014-11-07  6:44   ` [PATCH V4 14/14] irqchip: brcmstb-l2: Convert driver to use irq_reg_{readl,writel} Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 11/14] irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 12/14] irqchip: bcm7120-l2: Decouple driver from brcmstb-l2 Kevin Cernekee
2014-11-07  6:44 ` [PATCH V4 13/14] irqchip: bcm7120-l2: Convert driver to use irq_reg_{readl,writel} Kevin Cernekee
2014-11-07 12:27 ` [PATCH V4 00/14] genirq endian fixes; bcm7120/brcmstb IRQ updates Jason Cooper
     [not found]   ` <20141107122745.GJ3698-u4khhh1J0LxI1Ri9qeTfzeTW4wlIGRCZ@public.gmane.org>
2014-11-09  4:30     ` Jason Cooper

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