[PATCH v7 0/2] clk: shmobile: DIV6 clock variable parent support

[Ulrich Hecht <ulrich.hecht+renesas@gmail.com>]

Hi!

As Geert suggested, this revision fixes the number of parent clocks at one,
four, or eight to avoid ambiguity.

CU
Uli


Changes since v6:
- require exactly one, four, or eight parent clocks

Changes since v5:
- straighten types
- don't use hw->init outside cpg_div6_clock_init()
- drop superfluous allocation error messages
- drop renesas,src-* properties, can be inferred

Changes since v4:
- implement .get_parent, .set_parent
- improve bindings documentation

Changes since v3:
- note that renesas,src-shift and renesas,src-width depend on each other
- clarified description
- minor coding style fixes

Changes since v2:
- add r8a73a4 to bindings
- use u32 where appropriate
- don't split error message

Changes since v1:
- make sure unrelated register bits are preserved
- use the plural for the clocks property in bindings

Ulrich Hecht (2):
  clk: shmobile: div6: support selectable-input clocks
  clk: shmobile: document DIV6 clock parent bindings

 .../bindings/clock/renesas,cpg-div6-clocks.txt     |  18 ++--
 drivers/clk/shmobile/clk-div6.c                    | 113 ++++++++++++++++++---
 2 files changed, 113 insertions(+), 18 deletions(-)

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1.8.4.5