From: <tthayer@opensource.altera.com>
To: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, dinguyen@opensource.altera.com,
grant.likely@linaro.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com,
tthayer@opensource.altera.com
Subject: [PATCHv5 3/5] edac: altera: Remove SDRAM module compile
Date: Tue, 11 Nov 2014 18:14:21 -0600 [thread overview]
Message-ID: <1415751263-1830-4-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1415751263-1830-1-git-send-email-tthayer@opensource.altera.com>
From: Thor Thayer <tthayer@opensource.altera.com>
The SDRAM EDAC requires SDRAM configuration/initialization before
SDRAM is accessed (in the preloader). Having a module compile is
not desired so force to be built into kernel.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
v3: Added in this version as a separate patch.
v4/5: No change.
---
drivers/edac/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 7072c28..1719975 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -377,8 +377,8 @@ config EDAC_OCTEON_PCI
Cavium Octeon family of SOCs.
config EDAC_ALTERA_MC
- tristate "Altera SDRAM Memory Controller EDAC"
- depends on EDAC_MM_EDAC && ARCH_SOCFPGA
+ bool "Altera SDRAM Memory Controller EDAC"
+ depends on EDAC_MM_EDAC=y && ARCH_SOCFPGA
help
Support for error detection and correction on the
Altera SDRAM memory controller. Note that the
--
1.7.9.5
next prev parent reply other threads:[~2014-11-12 0:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-12 0:14 [PATCHv5 0/5] Add Altera peripheral memories to EDAC framework tthayer
2014-11-12 0:14 ` [PATCHv5 1/5] arm: socfpga: Enable L2 Cache ECC on startup tthayer
2014-11-12 7:32 ` Dinh Nguyen
2014-11-12 0:14 ` [PATCHv5 2/5] arm: socfpga: Enable OCRAM " tthayer
2014-11-12 7:33 ` Dinh Nguyen
[not found] ` <1415751263-1830-3-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2014-12-02 15:11 ` Mark Rutland
2014-12-02 17:54 ` Thor Thayer
2014-11-12 0:14 ` tthayer [this message]
2014-11-12 0:14 ` [PATCHv5 4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support tthayer
2014-12-02 15:25 ` Mark Rutland
2014-12-02 17:55 ` Thor Thayer
2014-11-12 0:14 ` [PATCHv5 5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC tthayer
2014-11-18 20:56 ` [RESEND PATCHv5 " Thor Thayer
2014-12-01 20:47 ` Thor Thayer
2014-12-02 15:01 ` Mark Rutland
2014-12-02 17:51 ` Thor Thayer
2014-12-02 14:57 ` [PATCHv5 " Mark Rutland
2014-12-02 17:55 ` Thor Thayer
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