From: hongzhou yang <hongzhou.yang@mediatek.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
"Ashwin Chaugule" <ashwin.chaugule@linaro.org>,
"Vladimir Murzin" <vladimir.murzin@arm.com>,
"Russell King" <linux@arm.linux.org.uk>,
"Heiko Stübner" <heiko@sntech.de>,
"Pawel Moll" <pawel.moll@arm.com>,
"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
"Catalin Marinas" <catalin.marinas@arm.com>,
dandan.he@mediatek.com,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
alan.cheng@mediatek.com, "Grant Likely" <grant.likely@linaro.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
toby.liu@mediatek.com, "Sascha Hauer" <kernel@pengutronix.de>,
"Kumar Gala" <galak@codeaurora.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"Joe.C" <yingjoe.chen@mediatek.com>,
"huang eddie" <eddie.huang@mediatek.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 2/3] dt-bindings: Add pinctrl bindings for mt65xx/mt81xx.
Date: Fri, 28 Nov 2014 12:19:13 +0800 [thread overview]
Message-ID: <1417148353.25975.2.camel@mhfsdcap03> (raw)
In-Reply-To: <CACRpkdYSe_BH_qiHma2BA+c2otEi3wd0TBXy83t8vwrNL+3U2g@mail.gmail.com>
On Thu, 2014-11-27 at 09:44 +0100, Linus Walleij wrote:
> On Tue, Nov 11, 2014 at 1:38 PM, Hongzhou Yang
> <hongzhou.yang@mediatek.com> wrote:
>
> > +* Mediatek MT65XX Pin Controller
> > +
> > +The Mediatek's Pin controller is used to control GPIO pins.
>
> It's not GPIO pins, since they are not always general purpose. It's just
> pins. Say "control SoC pins".
Ok, I'll modify it, thanks.
> > +Required properties:
> > +- compatible: value should be either of the following.
> > + (a) "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl.
> > +- mediatek,pctl-regmap: Should be a phandle of the syscfg node.
> > +- gpio-controller : Marks the device node as a gpio controller.
> > +- #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
> > + binding is used, the amount of cells must be specified as 2. See the below
> > + mentioned gpio binding representation for description of particular cells.
> > +
> > + Eg: <&pio 6 0>
> > + <[phandle of the gpio controller node]
> > + [pin number within the gpio controller]
>
> It's not a pin number really, it is a GPIO offset. But incidentally it's
> the same as the pin number. (This is OK...)
Yes, you're right, I will modify it. Thanks.
> > +- mediatek,pins: 2 integers array, represents gpio pinmux number and config
> > + setting. The format as following
> > +
> > + node {
> > + mediatek,pins = <PIN_NUMBER_PINMUX>;
> > + GENERIC_PINCONFIG;
> > + };
>
> As suggested by Sacha, use just "pins" and define the binding as a patch
> to Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> that is generic for multiplexing, so we get some order here.
>
> I want you however to put pin multiplexing and pin configuration into
> different nodes if possible. I don't like combines muxing and config
> nodes. If necessary tag the node with something.
>
> In the end we can also move the parsing functions to the pinctrl core, as
> long as the bindings are correct (possibly as a refactoring later).
>
> > + i2c0_pins_a: i2c0@0 {
> > + pins1 {
> > + mediatek,pins = <MT8135_PIN_100_SDA0__FUNC_SDA0>,
> > + <MT8135_PIN_101_SCL0__FUNC_SCL0>;
> > + bias-disable;
> > + };
> > + };
>
> I would split it up.
>
> i2c0_pins_a: i2c0@0 {
> pins1 {
> pins = <MT8135_PIN_100_SDA0>;
> function = <MT8135_PIN_100_FUNC_SDA0>;
> };
> pins2 {
> pins = <MT8135_PIN_100_SDA0>;
> bias-disable;
> };
> };
>
> One node for the multiplexing, one node for the config. This is the
> pattern used by most drivers, so I want to have this structure.
>
> It is also easy to tell one node from the other: if it contains "function"
> we know it's a multiplexing node, if it doesn't, it's a config node.
>
> Yours,
> Linus Walleij
next prev parent reply other threads:[~2014-11-28 4:19 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-11 12:38 [PATCH v3 0/3] Add Mediatek SoC Pinctrl/GPIO driver for MT8135 Hongzhou Yang
2014-11-11 12:38 ` [PATCH v3 1/3] ARM: mediatek: Add Pinctrl/GPIO driver for mt8135 Hongzhou Yang
[not found] ` <1415709535-31515-2-git-send-email-hongzhou.yang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2014-11-27 9:14 ` Linus Walleij
2014-11-28 5:06 ` hongzhou yang
2014-11-11 12:38 ` [PATCH v3 2/3] dt-bindings: Add pinctrl bindings for mt65xx/mt81xx Hongzhou Yang
[not found] ` <1415709535-31515-3-git-send-email-hongzhou.yang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2014-11-27 8:44 ` Linus Walleij
[not found] ` <CACRpkdYSe_BH_qiHma2BA+c2otEi3wd0TBXy83t8vwrNL+3U2g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-11-27 10:18 ` Sascha Hauer
[not found] ` <20141127101830.GP30369-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-11-28 16:12 ` Linus Walleij
[not found] ` <CACRpkdbMdJT6y-NL36RgQe0-CAFAVGqKiwY9+yFcwA7JDLmA+Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-02 13:55 ` Sascha Hauer
2015-01-10 21:33 ` Linus Walleij
2015-01-12 12:22 ` Sascha Hauer
[not found] ` <20150112122200.GC18908-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-01-13 10:05 ` Linus Walleij
[not found] ` <CACRpkdYXrdiRWMV8YpxrSLe2rLEV-ZnX7=36w21zGquh==6WgA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-01-13 16:16 ` Sascha Hauer
2015-01-13 16:24 ` Jean-Christophe PLAGNIOL-VILLARD
[not found] ` <20150113161614.GF23940-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-01-16 9:53 ` Linus Walleij
2015-01-16 10:23 ` Yingjoe Chen
2015-01-20 9:45 ` Linus Walleij
[not found] ` <CACRpkdYmjrEtds4wLr0cOmCPOLhS9xisfrY-cNZ3r0oh8n489Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-01-26 15:57 ` Sascha Hauer
2015-01-27 14:07 ` Linus Walleij
2014-11-28 4:19 ` hongzhou yang [this message]
2014-11-11 12:38 ` [PATCH v3 3/3] ARM: dts: mt8135: Add pinctrl/GPIO node for mt8135 Hongzhou Yang
2014-11-18 16:24 ` [PATCH v3 0/3] Add Mediatek SoC Pinctrl/GPIO driver for MT8135 Sascha Hauer
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