From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lucas Stach Subject: Re: [PATCH 1/4] pci: iProc: define Broadcom iProc PCIe binding Date: Wed, 10 Dec 2014 11:30:27 +0100 Message-ID: <1418207427.7616.5.camel@pengutronix.de> References: <1418169871-19232-1-git-send-email-rjui@broadcom.com> <1418169871-19232-2-git-send-email-rjui@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1418169871-19232-2-git-send-email-rjui@broadcom.com> Sender: linux-pci-owner@vger.kernel.org To: Ray Jui Cc: Bjorn Helgaas , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Grant Likely , Christian Daudt , Matt Porter , Florian Fainelli , Russell King , Scott Branden , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, devicetree@vger.kernel.org List-Id: devicetree@vger.kernel.org Am Dienstag, den 09.12.2014, 16:04 -0800 schrieb Ray Jui: > Document the PCIe device tree binding for Broadcom iProc family of SoCs > > Signed-off-by: Ray Jui > Reviewed-by: Scott Branden > --- > .../devicetree/bindings/pci/brcm,iproc-pcie.txt | 62 ++++++++++++++++++++ > 1 file changed, 62 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt > > diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt > new file mode 100644 > index 0000000..2467628 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt > @@ -0,0 +1,62 @@ > +* Broadcom iProc PCIe controller > + > +Required properties: > +- compatible: Must be "brcm,iproc-pcie" > +- reg: base address and length of the PCIe controller and the MDIO interface > + that controls the PCIe PHY > +- interrupts: interrupt IDs > +- bus-range: PCI bus numbers covered > +- #address-cells: set to <3> > +- #size-cells: set to <2> > +- device_type: set to "pci" > +- ranges: ranges for the PCI memory and I/O regions > +- phy-addr: MDC/MDIO adddress of the PCIe PHY > +- have-msi-inten-reg: Required for legacy iProc PCIe controllers that need the > + MSI interrupt enable register to be set explicitly > + > +The Broadcom iProc PCie driver adapts the multi-domain structure, i.e., each > +interface has its own domain and therefore has its own device node > +Example: > + > +SoC specific DT Entry: > + > + pcie0: pcie@18012000 { > + compatible = "brcm,iproc-pcie"; > + reg = <0x18012000 0x1000>, > + <0x18002000 0x1000>; > + interrupts = , > + , > + , > + , > + , > + ; This is missing the interrupt-map and interrupt-map-mask for the legacy INTx interrupts. If you add this you don't need to have a special map function in your driver, but can just use the standard of_irq_parse_and_map_pci() function. Regards, Lucas > + bus-range = <0x00 0xFF>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges = <0x81000000 0 0 0x28000000 0 0x00010000 /* downstream I/O */ > + 0x82000000 0 0x20000000 0x20000000 0 0x04000000>; /* non-prefetchable memory */ > + phy-addr = <5>; > + }; > + > + pcie1: pcie@18013000 { > + compatible = "brcm,iproc-pcie"; > + reg = <0x18013000 0x1000>, > + <0x18002000 0x1000>; > + > + interrupts = , > + , > + , > + , > + , > + ; > + bus-range = <0x00 0xFF>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges = <0x81000000 0 0 0x48000000 0 0x00010000 /* downstream I/O */ > + 0x82000000 0 0x40000000 0x40000000 0 0x04000000>; /* non-prefetchable memory */ > + phy-addr = <6>; > + }; -- Pengutronix e.K. | Lucas Stach | Industrial Linux Solutions | http://www.pengutronix.de/ |