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From: Kevin Cernekee <cernekee@gmail.com>
To: ralf@linux-mips.org
Cc: f.fainelli@gmail.com, tglx@linutronix.de, jason@lakedaemon.net,
	jogo@openwrt.org, arnd@arndb.de, computersforpeace@gmail.com,
	linux-mips@linux-mips.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH V5 14/23] MIPS: BMIPS: Document the firmware->kernel DTB interface
Date: Fri, 12 Dec 2014 14:07:05 -0800	[thread overview]
Message-ID: <1418422034-17099-15-git-send-email-cernekee@gmail.com> (raw)
In-Reply-To: <1418422034-17099-1-git-send-email-cernekee@gmail.com>

Add a new section covering the Generic BMIPS machine type.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
 Documentation/devicetree/booting-without-of.txt | 28 +++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index 7768518..e49e423 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -15,6 +15,7 @@ Table of Contents
     1) Entry point for arch/arm
     2) Entry point for arch/powerpc
     3) Entry point for arch/x86
+    4) Entry point for arch/mips/bmips
 
   II - The DT block format
     1) Header
@@ -288,6 +289,33 @@ it with special cases.
   or initrd address. It simply holds information which can not be retrieved
   otherwise like interrupt routing or a list of devices behind an I2C bus.
 
+4) Entry point for arch/mips/bmips
+----------------------------------
+
+  Some bootloaders only support a single entry point, at the start of the
+  kernel image.  Other bootloaders will jump to the ELF start address.
+  Both schemes are supported; CONFIG_BOOT_RAW=y and CONFIG_NO_EXCEPT_FILL=y,
+  so the first instruction immediately jumps to kernel_entry().
+
+  Similar to the arch/arm case (b), a DT-aware bootloader is expected to
+  set up the following registers:
+
+         a0 : 0
+
+         a1 : 0xffffffff
+
+         a2 : Physical pointer to the device tree block (defined in chapter
+         II) in RAM.  The device tree can be located anywhere in the first
+         512MB of the physical address space (0x00000000 - 0x1fffffff),
+         aligned on a 64 bit boundary.
+
+  Legacy bootloaders do not use this convention, and they do not pass in a
+  DT block.  In this case, Linux will look for a builtin DTB, selected via
+  CONFIG_DT_*.
+
+  This convention is defined for 32-bit systems only, as there are not
+  currently any 64-bit BMIPS implementations.
+
 II - The DT block format
 ========================
 
-- 
2.1.1

  parent reply	other threads:[~2014-12-12 22:07 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-12 22:06 [PATCH V5 00/23] Generic BMIPS kernel Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 01/23] MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init() Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 02/23] MIPS: Create a common <asm/mach-generic/war.h> Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 03/23] MIPS: bcm3384: Rename "bcm3384" target to "bmips" Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 04/23] irqchip: Update docs regarding irq_domain_add_tree() Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 05/23] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 06/23] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 07/23] irqchip: bcm7120-l2: Split STB-specific logic into its own function Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 08/23] irqchip: bcm7120-l2: Add support for BCM3380-style controllers Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 09/23] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 10/23] MIPS: Let __dt_register_buses accept a single bus type Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 11/23] MIPS: Fall back to the generic restart notifier Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 12/23] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 13/23] MIPS: BMIPS: Flush the readahead cache after DMA Kevin Cernekee
     [not found]   ` <1418422034-17099-14-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-12-15  9:43     ` Jonas Gorski
     [not found]       ` <CAOiHx=nX9jJEFZmkA-1fWj47whq85wj-ZgUxnZBwpAYDUfAO4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-20  1:39         ` Kevin Cernekee
     [not found]           ` <CAJiQ=7AZdwCX6bmLD1B4TzfmKriE3HVEEa5zP3WRnENZjGS-hA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-20 12:44             ` Jonas Gorski
     [not found]               ` <CAOiHx=m9RzU5n2fjJcph6u=avUAEZJYw0-mBCSMRzDJvSD5CFA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-20 17:28                 ` Kevin Cernekee
2014-12-21 10:56                 ` Florian Fainelli
2014-12-12 22:07 ` Kevin Cernekee [this message]
2014-12-12 22:07 ` [PATCH V5 15/23] MIPS: BMIPS: Rewrite DMA code to use "dma-ranges" property Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 16/23] MIPS: BMIPS: Remove bogus bus name Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 17/23] MIPS: BMIPS: Add quirks for several Broadcom platforms Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 18/23] MIPS: BMIPS: Delete the irqchip driver from irq.c Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 19/23] MIPS: BMIPS: Use a non-default FIXADDR_TOP setting Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 20/23] MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 21/23] MIPS: BMIPS: Refresh BCM3384 DTS files Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 22/23] MIPS: BMIPS: Update DT bindings to reflect new SoC support Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 23/23] MIPS: BMIPS: Add DTS files for several platforms Kevin Cernekee
     [not found] ` <1418422034-17099-1-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-12-15  9:58   ` [PATCH V5 00/23] Generic BMIPS kernel Arnd Bergmann

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