From: Kevin Cernekee <cernekee@gmail.com>
To: ralf@linux-mips.org
Cc: f.fainelli@gmail.com, tglx@linutronix.de, jason@lakedaemon.net,
jogo@openwrt.org, arnd@arndb.de, computersforpeace@gmail.com,
linux-mips@linux-mips.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH V5 21/23] MIPS: BMIPS: Refresh BCM3384 DTS files
Date: Fri, 12 Dec 2014 14:07:12 -0800 [thread overview]
Message-ID: <1418422034-17099-22-git-send-email-cernekee@gmail.com> (raw)
In-Reply-To: <1418422034-17099-1-git-send-email-cernekee@gmail.com>
The DT bindings for this platform have changed as the bootloader and
product requirements evolved. In particular, there are both
Linux-on-Zephyr and Linux-on-Viper configurations.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
arch/mips/boot/dts/bcm3384.dtsi | 109 ----------------------------
arch/mips/boot/dts/bcm3384_zephyr.dtsi | 126 +++++++++++++++++++++++++++++++++
arch/mips/boot/dts/bcm93384wvg.dts | 9 +--
3 files changed, 127 insertions(+), 117 deletions(-)
delete mode 100644 arch/mips/boot/dts/bcm3384.dtsi
create mode 100644 arch/mips/boot/dts/bcm3384_zephyr.dtsi
diff --git a/arch/mips/boot/dts/bcm3384.dtsi b/arch/mips/boot/dts/bcm3384.dtsi
deleted file mode 100644
index 21b074a..0000000
diff --git a/arch/mips/boot/dts/bcm3384_zephyr.dtsi b/arch/mips/boot/dts/bcm3384_zephyr.dtsi
new file mode 100644
index 0000000..a7bd856
--- /dev/null
+++ b/arch/mips/boot/dts/bcm3384_zephyr.dtsi
@@ -0,0 +1,126 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm3384", "brcm,bcm33843";
+
+ memory@0 {
+ device_type = "memory";
+
+ /* Typical range. The bootloader should fill this in. */
+ reg = <0x0 0x08000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* On BMIPS5000 this is 1/8th of the CPU core clock */
+ mips-hpt-frequency = <100000000>;
+
+ cpu@0 {
+ compatible = "brcm,bmips5000";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips5000";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ cpu_intc: cpu_intc {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ clocks {
+ periph_clk: periph_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <54000000>;
+ };
+ };
+
+ aliases {
+ uart0 = &uart0;
+ };
+
+ ubus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "brcm,ubus", "simple-bus";
+ ranges;
+ dma-ranges = <0x00000000 0x08000000 0x08000000>,
+ <0x08000000 0x00000000 0x08000000>;
+
+ periph_intc: periph_intc@14e00038 {
+ compatible = "brcm,bcm3380-l2-intc";
+ reg = <0x14e00038 0x4 0x14e0003c 0x4>,
+ <0x14e00340 0x4 0x14e00344 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <4>;
+ };
+
+ zmips_intc: zmips_intc@104b0060 {
+ compatible = "brcm,bcm3380-l2-intc";
+ reg = <0x104b0060 0x4 0x104b0064 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <29>;
+ brcm,int-map-mask = <0xffffffff>;
+ };
+
+ iop_intc: iop_intc@14e00058 {
+ compatible = "brcm,bcm3380-l2-intc";
+ reg = <0x14e00058 0x4 0x14e0005c 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <6>;
+ brcm,int-map-mask = <0xffffffff>;
+ };
+
+ uart0: serial@14e00520 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x14e00520 0x18>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+ clocks = <&periph_clk>;
+ status = "disabled";
+ };
+
+ ehci0: usb@15400300 {
+ compatible = "brcm,bcm3384-ehci", "generic-ehci";
+ reg = <0x15400300 0x100>;
+ big-endian;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <41>;
+ status = "disabled";
+ };
+
+ ohci0: usb@15400400 {
+ compatible = "brcm,bcm3384-ohci", "generic-ohci";
+ reg = <0x15400400 0x100>;
+ big-endian;
+ no-big-frame-no;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <40>;
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/mips/boot/dts/bcm93384wvg.dts b/arch/mips/boot/dts/bcm93384wvg.dts
index 8317411..d1e44a1 100644
--- a/arch/mips/boot/dts/bcm93384wvg.dts
+++ b/arch/mips/boot/dts/bcm93384wvg.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "bcm3384.dtsi"
+/include/ "bcm3384_zephyr.dtsi"
/ {
compatible = "brcm,bcm93384wvg", "brcm,bcm3384";
@@ -10,13 +10,6 @@
bootargs = "console=ttyS0,115200";
stdout-path = &uart0;
};
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x04000000>;
- dma-xor-mask = <0x08000000>;
- dma-xor-limit = <0x0fffffff>;
- };
};
&uart0 {
--
2.1.1
next prev parent reply other threads:[~2014-12-12 22:07 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-12 22:06 [PATCH V5 00/23] Generic BMIPS kernel Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 01/23] MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init() Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 02/23] MIPS: Create a common <asm/mach-generic/war.h> Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 03/23] MIPS: bcm3384: Rename "bcm3384" target to "bmips" Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 04/23] irqchip: Update docs regarding irq_domain_add_tree() Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 05/23] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 06/23] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 07/23] irqchip: bcm7120-l2: Split STB-specific logic into its own function Kevin Cernekee
2014-12-12 22:06 ` [PATCH V5 08/23] irqchip: bcm7120-l2: Add support for BCM3380-style controllers Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 09/23] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 10/23] MIPS: Let __dt_register_buses accept a single bus type Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 11/23] MIPS: Fall back to the generic restart notifier Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 12/23] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 13/23] MIPS: BMIPS: Flush the readahead cache after DMA Kevin Cernekee
[not found] ` <1418422034-17099-14-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-12-15 9:43 ` Jonas Gorski
[not found] ` <CAOiHx=nX9jJEFZmkA-1fWj47whq85wj-ZgUxnZBwpAYDUfAO4w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-20 1:39 ` Kevin Cernekee
[not found] ` <CAJiQ=7AZdwCX6bmLD1B4TzfmKriE3HVEEa5zP3WRnENZjGS-hA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-20 12:44 ` Jonas Gorski
[not found] ` <CAOiHx=m9RzU5n2fjJcph6u=avUAEZJYw0-mBCSMRzDJvSD5CFA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-20 17:28 ` Kevin Cernekee
2014-12-21 10:56 ` Florian Fainelli
2014-12-12 22:07 ` [PATCH V5 14/23] MIPS: BMIPS: Document the firmware->kernel DTB interface Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 15/23] MIPS: BMIPS: Rewrite DMA code to use "dma-ranges" property Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 16/23] MIPS: BMIPS: Remove bogus bus name Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 17/23] MIPS: BMIPS: Add quirks for several Broadcom platforms Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 18/23] MIPS: BMIPS: Delete the irqchip driver from irq.c Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 19/23] MIPS: BMIPS: Use a non-default FIXADDR_TOP setting Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 20/23] MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig Kevin Cernekee
2014-12-12 22:07 ` Kevin Cernekee [this message]
2014-12-12 22:07 ` [PATCH V5 22/23] MIPS: BMIPS: Update DT bindings to reflect new SoC support Kevin Cernekee
2014-12-12 22:07 ` [PATCH V5 23/23] MIPS: BMIPS: Add DTS files for several platforms Kevin Cernekee
[not found] ` <1418422034-17099-1-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-12-15 9:58 ` [PATCH V5 00/23] Generic BMIPS kernel Arnd Bergmann
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