From mboxrd@z Thu Jan  1 00:00:00 1970
From: Eddie Huang <eddie.huang@mediatek.com>
Subject: Re: [PATCH v2 3/4] arm64: dts: Add mediatek MT8173 SoC and
 evaluation board dts and Makefile
Date: Tue, 23 Dec 2014 16:02:03 +0800
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To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <Mark.Rutland@arm.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, Arnd Bergmann <arnd@arndb.de>, Pawel Moll <Pawel.Moll@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk>, Catalin Marinas <Catalin.Marinas@arm.com>, Mark Brown <broonie@linaro.org>, Will Deacon <Will.Deacon@arm.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, yh.chen@mediatek.com, Robert Richter <rrichter@cavium.com>, "srv_heupstream@mediatek.com" <srv_heupstream@mediatek.com>, Rob Herring <robh+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, Sascha Hauer <kernel@pengutronix.de>, Kumar Gala <galak@codeaurora.org>, Olof Johansson <olof@lixom.net>, "Joe.C" <yingjoe.chen@mediatek.com>, Thomas Gleixner <tglx@linutronix.de>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, Jason Cooper <jason@lakedaemon.net>
List-Id: devicetree@vger.kernel.org

Hi,

On Mon, 2014-12-22 at 09:07 +0000, Marc Zyngier wrote:
> On 20/12/14 20:07, Arnd Bergmann wrote:
> > On Wednesday 17 December 2014 15:01:29 Marc Zyngier wrote:
> >>
> >> Indeed, as described in the documentation:
> >> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/CHDIFAEE.html
> >>
> >> Also it is worth noticing that given how GICV is placed, it will never
> >> work with 64K pages and virtualization. Pretty sad.
> > 
> > Does this mean no VGIC support on this platform so you have to emulate it
> > in order to run virtual machines with 64K pages, or does it mean that
> > it's impossible to use that way because you can't emulate it?
> 
> As Peter said, this is not a configuration we're willing to support:
> - we don't have a API to tell userspace emulation about interrupts
> generated by the generic timers
> - we could move the whole GIC emulation into the kernel (at the moment,
> only the distributor is there), but that would be a complete nightmare
> 
> It really looks like a case of "let's drop a bunch of 64bit cores into
> an existing SoC". Shame people can't read integration guidelines...
> 
> 	M.

MT8173 use GIC-400. We check GIC-400 TRM that VGIC address is not 64KB
alignment. but GIC-500 (GICv3) VGIC base address is. We also check
3.19-rc1 arm64 device tree, amd-seattle-soc.dtsi VGIC is 64KB alignment,
but arm juno.dts is not, they are both GIC-400. So we are a little
confused, and still try to figure out what is the correct address.
Neverthless, MT8173 SoC already use 0x10224000 and 0x10225000 as VGIC
base address.