From: Kevin Cernekee <cernekee@gmail.com>
To: ralf@linux-mips.org
Cc: f.fainelli@gmail.com, jaedon.shin@gmail.com,
abrestic@chromium.org, tglx@linutronix.de, jason@lakedaemon.net,
jogo@openwrt.org, arnd@arndb.de, computersforpeace@gmail.com,
linux-mips@linux-mips.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH V6 20/25] MIPS: BMIPS: Delete the irqchip driver from irq.c
Date: Thu, 25 Dec 2014 09:49:15 -0800 [thread overview]
Message-ID: <1419529760-9520-21-git-send-email-cernekee@gmail.com> (raw)
In-Reply-To: <1419529760-9520-1-git-send-email-cernekee@gmail.com>
BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for
this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no
longer need this code under arch/mips.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
.../devicetree/bindings/mips/brcm/bcm3384-intc.txt | 37 ----
arch/mips/bmips/irq.c | 189 ++-------------------
2 files changed, 17 insertions(+), 209 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mips/brcm/bcm3384-intc.txt
diff --git a/Documentation/devicetree/bindings/mips/brcm/bcm3384-intc.txt b/Documentation/devicetree/bindings/mips/brcm/bcm3384-intc.txt
deleted file mode 100644
index d4e0141..0000000
diff --git a/arch/mips/bmips/irq.c b/arch/mips/bmips/irq.c
index fd94fe8..14552e5 100644
--- a/arch/mips/bmips/irq.c
+++ b/arch/mips/bmips/irq.c
@@ -3,191 +3,36 @@
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
- * Partially based on arch/mips/ralink/irq.c
- *
- * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
- * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
- * Copyright (C) 2014 Kevin Cernekee <cernekee@gmail.com>
+ * Copyright (C) 2014 Broadcom Corporation
+ * Author: Kevin Cernekee <cernekee@gmail.com>
*/
-#include <linux/io.h>
-#include <linux/bitops.h>
-#include <linux/of_platform.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/irqdomain.h>
-#include <linux/interrupt.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
+#include <linux/of.h>
+#include <linux/irqchip.h>
#include <asm/bmips.h>
+#include <asm/irq.h>
#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-
-/* INTC register offsets */
-#define INTC_REG_ENABLE 0x00
-#define INTC_REG_STATUS 0x04
-
-#define MAX_WORDS 2
-#define IRQS_PER_WORD 32
-
-struct bcm3384_intc {
- int n_words;
- void __iomem *reg[MAX_WORDS];
- u32 enable[MAX_WORDS];
- spinlock_t lock;
-};
-
-static void bcm3384_intc_irq_unmask(struct irq_data *d)
-{
- struct bcm3384_intc *priv = d->domain->host_data;
- unsigned long flags;
- int idx = d->hwirq / IRQS_PER_WORD;
- int bit = d->hwirq % IRQS_PER_WORD;
-
- spin_lock_irqsave(&priv->lock, flags);
- priv->enable[idx] |= BIT(bit);
- __raw_writel(priv->enable[idx], priv->reg[idx] + INTC_REG_ENABLE);
- spin_unlock_irqrestore(&priv->lock, flags);
-}
-
-static void bcm3384_intc_irq_mask(struct irq_data *d)
-{
- struct bcm3384_intc *priv = d->domain->host_data;
- unsigned long flags;
- int idx = d->hwirq / IRQS_PER_WORD;
- int bit = d->hwirq % IRQS_PER_WORD;
-
- spin_lock_irqsave(&priv->lock, flags);
- priv->enable[idx] &= ~BIT(bit);
- __raw_writel(priv->enable[idx], priv->reg[idx] + INTC_REG_ENABLE);
- spin_unlock_irqrestore(&priv->lock, flags);
-}
-
-static struct irq_chip bcm3384_intc_irq_chip = {
- .name = "INTC",
- .irq_unmask = bcm3384_intc_irq_unmask,
- .irq_mask = bcm3384_intc_irq_mask,
- .irq_mask_ack = bcm3384_intc_irq_mask,
-};
+#include <asm/time.h>
unsigned int get_c0_compare_int(void)
{
return CP0_LEGACY_COMPARE_IRQ;
}
-static void bcm3384_intc_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
- struct irq_domain *domain = irq_get_handler_data(irq);
- struct bcm3384_intc *priv = domain->host_data;
- unsigned long flags;
- unsigned int idx;
-
- for (idx = 0; idx < priv->n_words; idx++) {
- unsigned long pending;
- int hwirq;
-
- spin_lock_irqsave(&priv->lock, flags);
- pending = __raw_readl(priv->reg[idx] + INTC_REG_STATUS) &
- priv->enable[idx];
- spin_unlock_irqrestore(&priv->lock, flags);
-
- for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) {
- generic_handle_irq(irq_find_mapping(domain,
- hwirq + idx * IRQS_PER_WORD));
- }
- }
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned long pending =
- (read_c0_status() & read_c0_cause() & ST0_IM) >> STATUSB_IP0;
- int bit;
-
- for_each_set_bit(bit, &pending, 8)
- do_IRQ(MIPS_CPU_IRQ_BASE + bit);
-}
-
-static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
-{
- irq_set_chip_and_handler(irq, &bcm3384_intc_irq_chip, handle_level_irq);
- return 0;
-}
-
-static const struct irq_domain_ops irq_domain_ops = {
- .xlate = irq_domain_xlate_onecell,
- .map = intc_map,
-};
-
-static int __init ioremap_one_pair(struct bcm3384_intc *priv,
- struct device_node *node,
- int idx)
-{
- struct resource res;
-
- if (of_address_to_resource(node, idx, &res))
- return 0;
-
- if (request_mem_region(res.start, resource_size(&res),
- res.name) < 0)
- pr_err("Failed to request INTC register region\n");
-
- priv->reg[idx] = ioremap_nocache(res.start, resource_size(&res));
- if (!priv->reg[idx])
- panic("Failed to ioremap INTC register range");
-
- /* start up with everything masked before we hook the parent IRQ */
- __raw_writel(0, priv->reg[idx] + INTC_REG_ENABLE);
- priv->enable[idx] = 0;
-
- return IRQS_PER_WORD;
-}
-
-static int __init intc_of_init(struct device_node *node,
- struct device_node *parent)
+void __init arch_init_irq(void)
{
- struct irq_domain *domain;
- unsigned int parent_irq, n_irqs = 0;
- struct bcm3384_intc *priv;
-
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
- if (!priv)
- panic("Failed to allocate bcm3384_intc struct");
-
- spin_lock_init(&priv->lock);
-
- parent_irq = irq_of_parse_and_map(node, 0);
- if (!parent_irq)
- panic("Failed to get INTC IRQ");
-
- n_irqs += ioremap_one_pair(priv, node, 0);
- n_irqs += ioremap_one_pair(priv, node, 1);
-
- if (!n_irqs)
- panic("Failed to map INTC registers");
+ struct device_node *dn;
- priv->n_words = n_irqs / IRQS_PER_WORD;
- domain = irq_domain_add_linear(node, n_irqs, &irq_domain_ops, priv);
- if (!domain)
- panic("Failed to add irqdomain");
+ /* Only the STB (bcm7038) controller supports SMP IRQ affinity */
+ dn = of_find_compatible_node(NULL, NULL, "brcm,bcm7038-l1-intc");
+ if (dn)
+ of_node_put(dn);
+ else
+ bmips_tp1_irqs = 0;
- irq_set_chained_handler(parent_irq, bcm3384_intc_irq_handler);
- irq_set_handler_data(parent_irq, domain);
-
- return 0;
+ irqchip_init();
}
-static struct of_device_id of_irq_ids[] __initdata = {
- { .compatible = "mti,cpu-interrupt-controller",
- .data = mips_cpu_irq_of_init },
- { .compatible = "brcm,bcm3384-intc",
- .data = intc_of_init },
- {},
-};
-
-void __init arch_init_irq(void)
-{
- bmips_tp1_irqs = 0;
- of_irq_init(of_irq_ids);
-}
+OF_DECLARE_2(irqchip, mips_cpu_intc, "mti,cpu-interrupt-controller",
+ mips_cpu_irq_of_init);
--
2.1.1
next prev parent reply other threads:[~2014-12-25 17:49 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-25 17:48 [PATCH V6 00/25] Generic BMIPS kernel Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 01/25] MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init() Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 02/25] MIPS: Move device-trees into vendor sub-directories Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 03/25] MIPS: Add dtbs_install target Kevin Cernekee
2014-12-25 17:48 ` [PATCH V6 04/25] MIPS: Create a common <asm/mach-generic/war.h> Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 05/25] MIPS: bcm3384: Rename "bcm3384" target to "bmips" Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 07/25] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 08/25] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 10/25] irqchip: bcm7120-l2: Add support for BCM3380-style controllers Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 11/25] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 12/25] MIPS: Let __dt_register_buses accept a single bus type Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 13/25] MIPS: Fall back to the generic restart notifier Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 15/25] MIPS: BMIPS: Flush the readahead cache after DMA Kevin Cernekee
[not found] ` <1419529760-9520-16-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-03-25 9:23 ` Ralf Baechle
2015-03-25 17:08 ` Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 16/25] MIPS: BMIPS: Document the firmware->kernel DTB interface Kevin Cernekee
[not found] ` <1419529760-9520-1-git-send-email-cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-12-25 17:49 ` [PATCH V6 06/25] irqchip: Update docs regarding irq_domain_add_tree() Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 09/25] irqchip: bcm7120-l2: Split STB-specific logic into its own function Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 14/25] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 17/25] MIPS: BMIPS: Rewrite DMA code to use "dma-ranges" property Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 18/25] MIPS: BMIPS: Remove bogus bus name Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 22/25] MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 23/25] MIPS: BMIPS: Refresh BCM3384 DTS files Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 24/25] MIPS: BMIPS: Update DT bindings to reflect new SoC support Kevin Cernekee
2014-12-31 15:51 ` [PATCH V6 00/25] Generic BMIPS kernel Florian Fainelli
2014-12-25 17:49 ` [PATCH V6 19/25] MIPS: BMIPS: Add quirks for several Broadcom platforms Kevin Cernekee
2014-12-25 17:49 ` Kevin Cernekee [this message]
2014-12-25 17:49 ` [PATCH V6 21/25] MIPS: BMIPS: Use a non-default FIXADDR_TOP setting Kevin Cernekee
2014-12-25 17:49 ` [PATCH V6 25/25] MIPS: BMIPS: Add DTS files for several platforms Kevin Cernekee
2015-03-24 22:48 ` [PATCH V6 00/25] Generic BMIPS kernel Florian Fainelli
2015-03-29 20:18 ` Jason Cooper
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