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From: Jisheng Zhang <jszhang@marvell.com>
To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
	ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
	linux@arm.linux.org.uk, sebastian.hesselbarth@gmail.com,
	antoine.tenart@free-electrons.com,
	alexandre.belloni@free-electrons.com,
	thomas.petazzoni@free-electrons.com
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Jisheng Zhang <jszhang@marvell.com>
Subject: [PATCH v2 2/3] ARM: dts: berlin: add PPI cpu mask to twd timer interrupts
Date: Fri, 26 Dec 2014 16:58:00 +0800	[thread overview]
Message-ID: <1419584281-4811-3-git-send-email-jszhang@marvell.com> (raw)
In-Reply-To: <1419584281-4811-1-git-send-email-jszhang@marvell.com>

According to the gic binding document, "bits[15:8] PPI interrupt cpu
mask.  Each bit corresponds to each of the 8 possible cpus attached to
the GIC.  A bit set to '1' indicated the interrupt is wired to that
CPU." This patch wants to add the PPI cpu mask for completeness.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 arch/arm/boot/dts/berlin2.dtsi   | 2 +-
 arch/arm/boot/dts/berlin2cd.dtsi | 2 +-
 arch/arm/boot/dts/berlin2q.dtsi  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index 015a06c..63d00a6 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -104,7 +104,7 @@
 		local-timer@ad0600 {
 			compatible = "arm,cortex-a9-twd-timer";
 			reg = <0xad0600 0x20>;
-			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 			clocks = <&chip CLKID_TWD>;
 		};
 
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index a318bc3..81b670a 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -76,7 +76,7 @@
 		local-timer@ad0600 {
 			compatible = "arm,cortex-a9-twd-timer";
 			reg = <0xad0600 0x20>;
-			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
 			clocks = <&chip CLKID_TWD>;
 		};
 
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 933dcbb..41a683f 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -112,7 +112,7 @@
 			compatible = "arm,cortex-a9-twd-timer";
 			reg = <0xad0600 0x20>;
 			clocks = <&chip CLKID_TWD>;
-			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
 		gic: interrupt-controller@ad1000 {
-- 
2.1.4

  reply	other threads:[~2014-12-26  8:58 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-26  8:57 [PATCH v2 0/3] ARM: dts: berlin: add PMU and twd's cpu mask and fix GPIO locations Jisheng Zhang
2014-12-26  8:58 ` Jisheng Zhang [this message]
     [not found]   ` <1419584281-4811-3-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2015-01-07 14:39     ` [PATCH v2 2/3] ARM: dts: berlin: add PPI cpu mask to twd timer interrupts Sebastian Hesselbarth
     [not found] ` <1419584281-4811-1-git-send-email-jszhang-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
2014-12-26  8:57   ` [PATCH v2 1/3] ARM: dts: berlin: add pmu node for BG2Q and BG2CD Jisheng Zhang
2015-01-07 14:39     ` Sebastian Hesselbarth
2014-12-26  8:58   ` [PATCH v2 3/3] ARM: dts: berlin: correct BG2Q's SM GPIO location Jisheng Zhang
2015-01-07 14:38     ` Sebastian Hesselbarth

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