From: <tthayer@opensource.altera.com>
To: bp@alien8.de, dougthompson@xmission.com, m.chehab@samsung.com,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, dinguyen@opensource.altera.com,
grant.likely@linaro.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, tthayer.linux@gmail.com,
tthayer@opensource.altera.com,
linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org
Subject: [PATCHv6 3/5] edac: altera: Remove SDRAM module compile
Date: Thu, 8 Jan 2015 20:53:54 -0600 [thread overview]
Message-ID: <1420772036-3112-4-git-send-email-tthayer@opensource.altera.com> (raw)
In-Reply-To: <1420772036-3112-1-git-send-email-tthayer@opensource.altera.com>
From: Thor Thayer <tthayer@opensource.altera.com>
The SDRAM EDAC requires SDRAM configuration/initialization before
SDRAM is accessed (in the preloader). Having a module compile is
not desired so force to be built into kernel.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
v3: Added in this version as a separate patch.
v4-6: No change.
---
drivers/edac/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 49c2652..4d7285e 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -377,8 +377,8 @@ config EDAC_OCTEON_PCI
Cavium Octeon family of SOCs.
config EDAC_ALTERA_MC
- tristate "Altera SDRAM Memory Controller EDAC"
- depends on EDAC_MM_EDAC && ARCH_SOCFPGA
+ bool "Altera SDRAM Memory Controller EDAC"
+ depends on EDAC_MM_EDAC=y && ARCH_SOCFPGA
help
Support for error detection and correction on the
Altera SDRAM memory controller. Note that the
--
1.7.9.5
next prev parent reply other threads:[~2015-01-09 2:53 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-09 2:53 [PATCHv6 0/5] Add Altera peripheral memories to EDAC framework tthayer
2015-01-09 2:53 ` [PATCHv6 2/5] arm: socfpga: Enable OCRAM ECC on startup tthayer
2015-02-06 18:45 ` Mark Rutland
2015-02-06 22:05 ` Thor Thayer
2015-01-09 2:53 ` tthayer [this message]
[not found] ` <1420772036-3112-1-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-01-09 2:53 ` [PATCHv6 1/5] arm: socfpga: Enable L2 Cache " tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2015-02-06 18:52 ` Mark Rutland
2015-01-09 2:53 ` [PATCHv6 4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2015-02-06 19:17 ` Mark Rutland
2015-02-06 22:09 ` Thor Thayer
2015-02-07 10:02 ` Russell King - ARM Linux
2015-01-09 2:53 ` [PATCHv6 5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC entries tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx
2015-02-06 17:03 ` [RESEND PATCHv6 " Thor Thayer
[not found] ` <1420772036-3112-6-git-send-email-tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2015-02-06 19:24 ` [PATCHv6 " Mark Rutland
2015-02-06 22:04 ` Thor Thayer
2015-01-29 20:53 ` [PATCHv6 0/5] Add Altera peripheral memories to EDAC framework Thor Thayer
2015-02-06 19:29 ` Mark Rutland
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