From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen-Yu Tsai Subject: [PATCH v2 1/9] clk: sunxi: Add support for sun9i a80 usb clocks and resets Date: Sun, 25 Jan 2015 20:22:02 +0800 Message-ID: <1422188530-1794-2-git-send-email-wens@csie.org> References: <1422188530-1794-1-git-send-email-wens@csie.org> Reply-To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <1422188530-1794-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Maxime Ripard , Mike Turquette , Emilio Lopez , Rob Herring , Grant Likely , Kishon Vijay Abraham I Cc: Chen-Yu Tsai , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org The USB controller/phy clocks and reset controls are in a separate address block, unlike previous SoCs where they were in the clock controller. This patch copies the original gates clk functions used for usb clocks into a separate file, and renames them to *_usb_*. Also add a per-gate parent index, so we can set different parents for each gate. Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/clock/sunxi.txt | 2 + drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk-usb.c | 193 ++++++++++++++++++= ++++ 3 files changed, 196 insertions(+) create mode 100644 drivers/clk/sunxi/clk-usb.c diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentat= ion/devicetree/bindings/clock/sunxi.txt index 60b44285250d..3f1dcd879af7 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt @@ -66,6 +66,8 @@ Required properties: "allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20 "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13 "allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31 + "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80 + "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80 =20 Required properties for all clocks: - reg : shall be the control register address for the clock. diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 3a5292e3fcf8..058f273d6154 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -9,6 +9,7 @@ obj-y +=3D clk-mod0.o obj-y +=3D clk-sun8i-mbus.o obj-y +=3D clk-sun9i-core.o obj-y +=3D clk-sun9i-mmc.o +obj-y +=3D clk-usb.o =20 obj-$(CONFIG_MFD_SUN6I_PRCM) +=3D \ clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \ diff --git a/drivers/clk/sunxi/clk-usb.c b/drivers/clk/sunxi/clk-usb.c new file mode 100644 index 000000000000..1a93400353de --- /dev/null +++ b/drivers/clk/sunxi/clk-usb.c @@ -0,0 +1,193 @@ +/* + * Copyright 2013 Emilio L=C3=B3pez + * + * Emilio L=C3=B3pez + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + + +/** + * sunxi_usb_reset... - reset bits in usb clk registers handling + */ + +struct usb_reset_data { + void __iomem *reg; + spinlock_t *lock; + struct clk *clk; + struct reset_controller_dev rcdev; +}; + +static int sunxi_usb_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct usb_reset_data *data =3D container_of(rcdev, + struct usb_reset_data, + rcdev); + unsigned long flags; + u32 reg; + + clk_prepare_enable(data->clk); + spin_lock_irqsave(data->lock, flags); + + reg =3D readl(data->reg); + writel(reg & ~BIT(id), data->reg); + + spin_unlock_irqrestore(data->lock, flags); + clk_disable_unprepare(data->clk); + + return 0; +} + +static int sunxi_usb_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct usb_reset_data *data =3D container_of(rcdev, + struct usb_reset_data, + rcdev); + unsigned long flags; + u32 reg; + + clk_prepare_enable(data->clk); + spin_lock_irqsave(data->lock, flags); + + reg =3D readl(data->reg); + writel(reg | BIT(id), data->reg); + + spin_unlock_irqrestore(data->lock, flags); + clk_disable_unprepare(data->clk); + + return 0; +} + +static struct reset_control_ops sunxi_usb_reset_ops =3D { + .assert =3D sunxi_usb_reset_assert, + .deassert =3D sunxi_usb_reset_deassert, +}; + +/** + * sunxi_usb_clk_setup() - Setup function for usb gate clocks + */ + +#define SUNXI_USB_MAX_SIZE 32 + +struct usb_clk_data { + u32 clk_mask; + u32 reset_mask; + bool reset_needs_clk; +}; + +static void __init sunxi_usb_clk_setup(struct device_node *node, + const struct usb_clk_data *data, + spinlock_t *lock) +{ + struct clk_onecell_data *clk_data; + struct usb_reset_data *reset_data; + const char *clk_parent; + const char *clk_name; + void __iomem *reg; + int qty; + int i =3D 0; + int j =3D 0; + + reg =3D of_io_request_and_map(node, 0, of_node_full_name(node)); + + clk_parent =3D of_clk_get_parent_name(node, 0); + if (!clk_parent) + return; + + /* Worst-case size approximation and memory allocation */ + qty =3D find_last_bit((unsigned long *)&data->clk_mask, + SUNXI_USB_MAX_SIZE); + clk_data =3D kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); + if (!clk_data) + return; + clk_data->clks =3D kzalloc((qty+1) * sizeof(struct clk *), GFP_KERNEL); + if (!clk_data->clks) { + kfree(clk_data); + return; + } + + for_each_set_bit(i, (unsigned long *)&data->clk_mask, + SUNXI_USB_MAX_SIZE) { + of_property_read_string_index(node, "clock-output-names", + j, &clk_name); + clk_data->clks[i] =3D clk_register_gate(NULL, clk_name, + clk_parent, 0, + reg, i, 0, lock); + WARN_ON(IS_ERR(clk_data->clks[i])); + clk_register_clkdev(clk_data->clks[i], clk_name, NULL); + + j++; + } + + /* Adjust to the real max */ + clk_data->clk_num =3D i; + + of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); + + /* Register a reset controller for usb with reset bits */ + if (data->reset_mask =3D=3D 0) + return; + + reset_data =3D kzalloc(sizeof(*reset_data), GFP_KERNEL); + if (!reset_data) + return; + + if (data->reset_needs_clk) + reset_data->clk =3D of_clk_get(node, 0); + if (IS_ERR(reset_data->clk)) { + pr_err("Could not get clock for reset controls\n"); + kfree(reset_data); + return; + } + reset_data->reg =3D reg; + reset_data->lock =3D lock; + reset_data->rcdev.nr_resets =3D __fls(data->reset_mask) + 1; + reset_data->rcdev.ops =3D &sunxi_usb_reset_ops; + reset_data->rcdev.of_node =3D node; + reset_controller_register(&reset_data->rcdev); +} + +static const struct usb_clk_data sun9i_a80_usb_mod_data __initconst =3D { + .clk_mask =3D BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1), + .reset_mask =3D BIT(19) | BIT(18) | BIT(17), + .reset_needs_clk =3D 1, +}; + +static DEFINE_SPINLOCK(a80_usb_mod_lock); + +static void __init sun9i_a80_usb_mod_setup(struct device_node *node) +{ + sunxi_usb_clk_setup(node, &sun9i_a80_usb_mod_data, &a80_usb_mod_lock); +} +CLK_OF_DECLARE(sun9i_a80_usb_mod, "allwinner,sun9i-a80-usb-mod-clk", sun9i= _a80_usb_mod_setup); + +static const struct usb_clk_data sun9i_a80_usb_phy_data __initconst =3D { + .clk_mask =3D BIT(10) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1), + .reset_mask =3D BIT(21) | BIT(20) | BIT(19) | BIT(18) | BIT(17), + .reset_needs_clk =3D 1, +}; + +static DEFINE_SPINLOCK(a80_usb_phy_lock); + +static void __init sun9i_a80_usb_phy_setup(struct device_node *node) +{ + sunxi_usb_clk_setup(node, &sun9i_a80_usb_phy_data, &a80_usb_phy_lock); +} +CLK_OF_DECLARE(sun9i_a80_usb_phy, "allwinner,sun9i-a80-usb-phy-clk", sun9i= _a80_usb_phy_setup); --=20 2.1.4 --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. 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