From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: [PATCH 1/4] arm64: dts: fix PMU IRQ ordering for Juno Date: Mon, 26 Jan 2015 17:54:15 +0000 Message-ID: <1422294858-28100-1-git-send-email-will.deacon@arm.com> Return-path: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Will Deacon , Mark Rutland List-Id: devicetree@vger.kernel.org For better or worse, perf expects the per-cpu SPI PMU interrupts to be listed in order of logical CPU. This patch fixes the Juno .dts to satisfy that requirement. Without this patch, I see unhandled IRQs in mainline: irq 9: nobody cared (try booting with the "irqpoll" option) CPU: 3 PID: 2830 Comm: cc1 Not tainted 3.19.0-rc6+ #1 Hardware name: ARM Juno development board (r0) (DT) [...] handlers: [] armv8pmu_handle_irq Disabling IRQ #9 Cc: Mark Rutland Signed-off-by: Will Deacon --- This is an immediate fix for mainline, with the remaining patches in the series solving this by extending the binding. arch/arm64/boot/dts/arm/juno.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index cb3073e4e7a8..4ed9287aaef1 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -107,11 +107,11 @@ pmu { compatible = "arm,armv8-pmuv3"; interrupts = , + , + , , , - , - , - ; + ; }; /include/ "juno-clocks.dtsi" -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html