From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vignesh R Subject: [PATCH 0/2] fix ehrpwm tbclk data on am33xx and am43xx Date: Tue, 10 Feb 2015 11:05:40 +0530 Message-ID: <1423546542-29664-1-git-send-email-vigneshr@ti.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-kernel-owner@vger.kernel.org To: Benoit Cousson , Tony Lindgren , Tero Kristo , Russell King Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Vignesh R List-Id: devicetree@vger.kernel.org In am33xx and am43xx, ehrpwm tbclk is derived from functional clock of PWMSS. The schematics and TRMs show that there is only one input clock to the PWMSS. But currently, tbclk is wrongly shown to be deriving from dpll_per_m2_ck instead of functional clock l4ls_gclk in the DT. Fixing ehrpwm tbclk data to reflect the right clk source. Tested on beaglebone and am437x-gp-evm. Vignesh R (2): ARM: dts: am33xx-clocks: Fix ehrpwm tbclk data on am33xx ARM: dts: am43xx-clocks: Fix ehrpwm tbclk data on am43xx arch/arm/boot/dts/am33xx-clocks.dtsi | 6 +++--- arch/arm/boot/dts/am43xx-clocks.dtsi | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-) -- 1.9.1