* [Patch V5 02/12] ASoC: max98357a: Document MAX98357A bindings
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 3:29 ` Mark Brown
2015-02-12 2:10 ` [Patch V5 03/12] ASoC: qcom: Document LPASS CPU bindings Kenneth Westfield
` (7 subsequent siblings)
8 siblings, 1 reply; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Add documentation to the sound directory of the
device-tree bindings for the Maxim MAX98357A audio
DAC.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
Documentation/devicetree/bindings/sound/max98357a.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/max98357a.txt
diff --git a/Documentation/devicetree/bindings/sound/max98357a.txt b/Documentation/devicetree/bindings/sound/max98357a.txt
new file mode 100644
index 0000000000000000000000000000000000000000..a7a149a236e55b8372b7cb3622cd6a6c664d4e2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/max98357a.txt
@@ -0,0 +1,14 @@
+Maxim MAX98357A audio DAC
+
+This node models the Maxim MAX98357A DAC.
+
+Required properties:
+- compatible : "maxim,max98357a"
+- sdmode-gpios : GPIO specifier for the GPIO -> DAC SDMODE pin
+
+Example:
+
+max98357a {
+ compatible = "maxim,max98357a";
+ sdmode-gpios = <&qcom_pinmux 25 0>;
+};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [Patch V5 02/12] ASoC: max98357a: Document MAX98357A bindings
2015-02-12 2:10 ` [Patch V5 02/12] ASoC: max98357a: Document MAX98357A bindings Kenneth Westfield
@ 2015-02-12 3:29 ` Mark Brown
2015-02-12 10:41 ` Kenneth Westfield
0 siblings, 1 reply; 16+ messages in thread
From: Mark Brown @ 2015-02-12 3:29 UTC (permalink / raw)
To: Kenneth Westfield
Cc: Takashi Iwai, Liam Girdwood, David Brown, Bryan Huntsman, Greg KH,
Banajit Goswami, Patrick Lai, ALSA Mailing List,
Device Tree Mailing List, MSM Mailing List
[-- Attachment #1: Type: text/plain, Size: 355 bytes --]
On Wed, Feb 11, 2015 at 06:10:05PM -0800, Kenneth Westfield wrote:
> From: Kenneth Westfield <kwestfie@codeaurora.org>
>
> Add documentation to the sound directory of the
> device-tree bindings for the Maxim MAX98357A audio
> DAC.
This driver has already been applied. If there are any changes to
current code please send incremental patches.
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 473 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Patch V5 02/12] ASoC: max98357a: Document MAX98357A bindings
2015-02-12 3:29 ` Mark Brown
@ 2015-02-12 10:41 ` Kenneth Westfield
0 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 10:41 UTC (permalink / raw)
To: Mark Brown
Cc: Kenneth Westfield, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai,
ALSA Mailing List, Device Tree Mailing List, MSM Mailing List
On Thu, Feb 12, 2015 at 11:29:18AM +0800, Mark Brown wrote:
> On Wed, Feb 11, 2015 at 06:10:05PM -0800, Kenneth Westfield wrote:
> > From: Kenneth Westfield <kwestfie@codeaurora.org>
> >
> > Add documentation to the sound directory of the
> > device-tree bindings for the Maxim MAX98357A audio
> > DAC.
>
> This driver has already been applied. If there are any changes to
> current code please send incremental patches.
No changes from V4 to V5. Please drop this patch.
--
Kenneth Westfield
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Patch V5 03/12] ASoC: qcom: Document LPASS CPU bindings
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 02/12] ASoC: max98357a: Document MAX98357A bindings Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
[not found] ` <1423707015-14527-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (6 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Add documentation to the sound directory of the
device-tree bindings for the IPQ806x LPASS CPU DAI
device.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
.../devicetree/bindings/sound/qcom,lpass-cpu.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
new file mode 100644
index 0000000000000000000000000000000000000000..621773d1c64af8f4f9eaceb2f7d2d7ec17c66aeb
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
@@ -0,0 +1,38 @@
+* Qualcomm Technologies LPASS CPU DAI
+
+This node models the Qualcomm Technologies Low-Power Audio SubSystem.
+
+Required properties:
+
+- compatible : "qcom,lpass-cpu"
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : A list which must include the following entries:
+ * "ahbix-clk"
+ * "mi2s-osr-clk"
+ * "mi2s-bit-clk"
+- interrupts : Must contain an entry for each entry in
+ interrupt-names.
+- interrupt-names : A list which must include the following entries:
+ * "lpass-irq-lpaif"
+- pinctrl-N : One property must exist for each entry in
+ pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
+ for details of the property values.
+- pinctrl-names : Must contain a "default" entry.
+- reg : Must contain an address for each entry in reg-names.
+- reg-names : A list which must include the following entries:
+ * "lpass-lpaif"
+
+Example:
+
+lpass@28100000 {
+ compatible = "qcom,lpass-cpu";
+ clocks = <&lcc AHBIX_CLK>, <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>;
+ clock-names = "ahbix-clk", "mi2s-osr-clk", "mi2s-bit-clk";
+ interrupts = <0 85 1>;
+ interrupt-names = "lpass-irq-lpaif";
+ pinctrl-names = "default", "idle";
+ pinctrl-0 = <&mi2s_default>;
+ pinctrl-1 = <&mi2s_idle>;
+ reg = <0x28100000 0x10000>;
+ reg-names = "lpass-lpaif";
+};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 16+ messages in thread[parent not found: <1423707015-14527-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>]
* [Patch V5 01/12] MAINTAINERS: Add QCOM audio ASoC maintainer
[not found] ` <1423707015-14527-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 04/12] ASoC: qcom: Document IPQ806X-MAX89357A bindings Kenneth Westfield
` (2 subsequent siblings)
3 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Add maintainers for the Qualcomm Technologies
sound drivers.
Signed-off-by: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Acked-by: Banajit Goswami <bgoswami-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d66a97dd3a12548e0f79c59154260724da11f282..9beda051e158156e2f7742485059ca299ed6a3d5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5183,6 +5183,13 @@ F: drivers/char/ipmi/
F: include/linux/ipmi*
F: include/uapi/linux/ipmi*
+QCOM AUDIO (ASoC) DRIVERS
+M: Patrick Lai <plai-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+M: Banajit Goswami <bgoswami-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+L: alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw@public.gmane.org (moderated for non-subscribers)
+S: Supported
+F: sound/soc/qcom/
+
IPS SCSI RAID DRIVER
M: Adaptec OEM Raid Solutions <aacraid-ugMvIWC9OiRBDgjK7y7TUQ@public.gmane.org>
L: linux-scsi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
--
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^ permalink raw reply related [flat|nested] 16+ messages in thread* [Patch V5 04/12] ASoC: qcom: Document IPQ806X-MAX89357A bindings
[not found] ` <1423707015-14527-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-02-12 2:10 ` [Patch V5 01/12] MAINTAINERS: Add QCOM audio ASoC maintainer Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 05/12] ASoC: codec: Add MAX98357A codec driver Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 06/12] ASoC: ipq806x: add LPASS header files Kenneth Westfield
3 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Add documentation to the sound directory of the
device-tree bindings for the IPQ806x-MAX98357A
soundcard.
Signed-off-by: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Acked-by: Banajit Goswami <bgoswami-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
.../bindings/sound/qcom,ipq806x-max98357a.txt | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/qcom,ipq806x-max98357a.txt
diff --git a/Documentation/devicetree/bindings/sound/qcom,ipq806x-max98357a.txt b/Documentation/devicetree/bindings/sound/qcom,ipq806x-max98357a.txt
new file mode 100644
index 0000000000000000000000000000000000000000..54c6211ce34ab8eb5c764df516c875694eeab3cb
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,ipq806x-max98357a.txt
@@ -0,0 +1,24 @@
+* Qualcomm Technologies IPQ806x-MAX98357A SoundCard
+
+This node models a soundcard for boards with the Qualcomm Technologies IPQ806x
+SOC connected to a MAX98357A DAC via I2S.
+
+Required properties:
+
+- compatible : "qcom,ipq806x-max98357a"
+- qcom,model : The user-visible name of this sound card.
+- cpu : Phandle of the CPU DAI
+- codec : Phandle of the codec DAI
+- codec-dai : Name of the codec DAI which must be selected from one of the
+ following entries:
+ * max98357a
+
+Example:
+
+sound {
+ compatible = "qcom,ipq806x-max98357a";
+ model = "ipq806x-max98357a";
+ cpu = <&lpass_cpu>;
+ codec = <&max98357a>;
+ codec-dai = "max98357a";
+};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
--
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^ permalink raw reply related [flat|nested] 16+ messages in thread* [Patch V5 05/12] ASoC: codec: Add MAX98357A codec driver
[not found] ` <1423707015-14527-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-02-12 2:10 ` [Patch V5 01/12] MAINTAINERS: Add QCOM audio ASoC maintainer Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 04/12] ASoC: qcom: Document IPQ806X-MAX89357A bindings Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 10:45 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 06/12] ASoC: ipq806x: add LPASS header files Kenneth Westfield
3 siblings, 1 reply; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Add codec driver for the Maxim MAX98357A DAC.
Signed-off-by: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Acked-by: Banajit Goswami <bgoswami-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
sound/soc/codecs/Kconfig | 4 ++
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/max98357a.c | 145 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 151 insertions(+)
create mode 100644 sound/soc/codecs/max98357a.c
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 8349f982a586841a3ac9e7b0526af05699c7deaf..0500b3ed5fa5ac4d45663ad659da9db3003bc5a3 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -69,6 +69,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_MAX98088 if I2C
select SND_SOC_MAX98090 if I2C
select SND_SOC_MAX98095 if I2C
+ select SND_SOC_MAX98357A if GPIOLIB
select SND_SOC_MAX9850 if I2C
select SND_SOC_MAX9768 if I2C
select SND_SOC_MAX9877 if I2C
@@ -456,6 +457,9 @@ config SND_SOC_MAX98090
config SND_SOC_MAX98095
tristate
+config SND_SOC_MAX98357A
+ tristate
+
config SND_SOC_MAX9850
tristate
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index bbdfd1e1c182f9ee102f532f391f522e77a8922b..69b8666d187a0e8d1e2a532e68e2509acc95da7e 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -64,6 +64,7 @@ snd-soc-max9768-objs := max9768.o
snd-soc-max98088-objs := max98088.o
snd-soc-max98090-objs := max98090.o
snd-soc-max98095-objs := max98095.o
+snd-soc-max98357a-objs := max98357a.o
snd-soc-max9850-objs := max9850.o
snd-soc-mc13783-objs := mc13783.o
snd-soc-ml26124-objs := ml26124.o
@@ -245,6 +246,7 @@ obj-$(CONFIG_SND_SOC_MAX9768) += snd-soc-max9768.o
obj-$(CONFIG_SND_SOC_MAX98088) += snd-soc-max98088.o
obj-$(CONFIG_SND_SOC_MAX98090) += snd-soc-max98090.o
obj-$(CONFIG_SND_SOC_MAX98095) += snd-soc-max98095.o
+obj-$(CONFIG_SND_SOC_MAX98357A) += snd-soc-max98357a.o
obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o
obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o
obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o
diff --git a/sound/soc/codecs/max98357a.c b/sound/soc/codecs/max98357a.c
new file mode 100644
index 0000000000000000000000000000000000000000..4ee23fbc4e1237268ae104319a9cfe4fc369934e
--- /dev/null
+++ b/sound/soc/codecs/max98357a.c
@@ -0,0 +1,145 @@
+/* Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * max98357a.c -- MAX98357A ALSA SoC Codec driver
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
+#include <linux/kernel.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+#include <sound/soc-dapm.h>
+
+static int max98357a_daiops_trigger(struct snd_pcm_substream *substream,
+ int cmd, struct snd_soc_dai *dai)
+{
+ struct gpio_desc *sdmode = snd_soc_dai_get_drvdata(dai);
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ gpiod_set_value(sdmode, 1);
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ gpiod_set_value(sdmode, 0);
+ break;
+ }
+
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget max98357a_dapm_widgets[] = {
+ SND_SOC_DAPM_DAC("SDMode", NULL, SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_OUTPUT("Speaker"),
+};
+
+static const struct snd_soc_dapm_route max98357a_dapm_routes[] = {
+ {"Speaker", NULL, "SDMode"},
+};
+
+static int max98357a_codec_probe(struct snd_soc_codec *codec)
+{
+ struct gpio_desc *sdmode;
+
+ sdmode = devm_gpiod_get(codec->dev, "sdmode");
+ if (IS_ERR(sdmode)) {
+ dev_err(codec->dev, "%s() unable to get sdmode GPIO: %ld\n",
+ __func__, PTR_ERR(sdmode));
+ return PTR_ERR(sdmode);
+ }
+ gpiod_direction_output(sdmode, 0);
+ snd_soc_codec_set_drvdata(codec, sdmode);
+
+ return 0;
+}
+
+static struct snd_soc_codec_driver max98357a_codec_driver = {
+ .probe = max98357a_codec_probe,
+ .dapm_widgets = max98357a_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(max98357a_dapm_widgets),
+ .dapm_routes = max98357a_dapm_routes,
+ .num_dapm_routes = ARRAY_SIZE(max98357a_dapm_routes),
+};
+
+static struct snd_soc_dai_ops max98357a_dai_ops = {
+ .trigger = max98357a_daiops_trigger,
+};
+
+static struct snd_soc_dai_driver max98357a_dai_driver = {
+ .name = "max98357a",
+ .playback = {
+ .stream_name = "max98357a-playback",
+ .formats = SNDRV_PCM_FMTBIT_S16 |
+ SNDRV_PCM_FMTBIT_S24 |
+ SNDRV_PCM_FMTBIT_S32,
+ .rates = SNDRV_PCM_RATE_8000 |
+ SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_96000,
+ .rate_min = 8000,
+ .rate_max = 96000,
+ .channels_min = 1,
+ .channels_max = 2,
+ },
+ .ops = &max98357a_dai_ops,
+};
+
+static int max98357a_platform_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ ret = snd_soc_register_codec(&pdev->dev, &max98357a_codec_driver,
+ &max98357a_dai_driver, 1);
+ if (ret)
+ dev_err(&pdev->dev, "%s() error registering codec driver: %d\n",
+ __func__, ret);
+
+ return ret;
+}
+
+static int max98357a_platform_remove(struct platform_device *pdev)
+{
+ snd_soc_unregister_codec(&pdev->dev);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id max98357a_device_id[] = {
+ { .compatible = "maxim,max98357a" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, max98357a_device_id);
+#endif
+
+static struct platform_driver max98357a_platform_driver = {
+ .driver = {
+ .name = "max98357a",
+ .of_match_table = of_match_ptr(max98357a_device_id),
+ },
+ .probe = max98357a_platform_probe,
+ .remove = max98357a_platform_remove,
+};
+module_platform_driver(max98357a_platform_driver);
+
+MODULE_DESCRIPTION("Maxim MAX98357A Codec Driver");
+MODULE_LICENSE("GPL v2");
--
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a Linux Foundation Collaborative Project
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [Patch V5 05/12] ASoC: codec: Add MAX98357A codec driver
2015-02-12 2:10 ` [Patch V5 05/12] ASoC: codec: Add MAX98357A codec driver Kenneth Westfield
@ 2015-02-12 10:45 ` Kenneth Westfield
0 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 10:45 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
On Wed, Feb 11, 2015 at 06:10:08PM -0800, Kenneth Westfield wrote:
> From: Kenneth Westfield <kwestfie@codeaurora.org>
>
> Add codec driver for the Maxim MAX98357A DAC.
>
> Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
> Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
> ---
> sound/soc/codecs/Kconfig | 4 ++
> sound/soc/codecs/Makefile | 2 +
> sound/soc/codecs/max98357a.c | 145 +++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 151 insertions(+)
> create mode 100644 sound/soc/codecs/max98357a.c
Posted changes from V4 to V5 here:
http://mailman.alsa-project.org/pipermail/alsa-devel/2015-February/087872.html
Please drop this patch.
--
Kenneth Westfield
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Patch V5 06/12] ASoC: ipq806x: add LPASS header files
[not found] ` <1423707015-14527-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
` (2 preceding siblings ...)
2015-02-12 2:10 ` [Patch V5 05/12] ASoC: codec: Add MAX98357A codec driver Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
3 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Add the LPASS header files for ipq806x SOC. This
includes the register definitions for the ipq806x
LPAIF, and the structure definition for the driver
data.
Signed-off-by: Kenneth Westfield <kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Acked-by: Banajit Goswami <bgoswami-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
sound/soc/qcom/lpass-lpaif-ipq806x.h | 172 +++++++++++++++++++++++++++++++++++
sound/soc/qcom/lpass.h | 51 +++++++++++
2 files changed, 223 insertions(+)
create mode 100644 sound/soc/qcom/lpass-lpaif-ipq806x.h
create mode 100644 sound/soc/qcom/lpass.h
diff --git a/sound/soc/qcom/lpass-lpaif-ipq806x.h b/sound/soc/qcom/lpass-lpaif-ipq806x.h
new file mode 100644
index 0000000000000000000000000000000000000000..dc423b8888425e60ebb11cd0ce78da2574ed27c2
--- /dev/null
+++ b/sound/soc/qcom/lpass-lpaif-ipq806x.h
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * lpass-lpaif-ipq806x.h -- Definitions for the QTi LPAIF in the ipq806x LPASS
+ */
+
+#ifndef __LPASS_LPAIF_H__
+#define __LPASS_LPAIF_H__
+
+#define LPAIF_BANK_OFFSET 0x1000
+
+/* LPAIF I2S */
+
+#define LPAIF_I2SCTL_REG_BASE 0x0010
+#define LPAIF_I2SCTL_REG_STRIDE 0x4
+#define LPAIF_I2SCTL_REG_ADDR(addr, port) \
+ (LPAIF_I2SCTL_REG_BASE + (addr) + (LPAIF_I2SCTL_REG_STRIDE * (port)))
+
+enum lpaif_i2s_ports {
+ LPAIF_I2S_PORT_MIN = 0,
+
+ LPAIF_I2S_PORT_CODEC_SPK = 0,
+ LPAIF_I2S_PORT_CODEC_MIC = 1,
+ LPAIF_I2S_PORT_SEC_SPK = 2,
+ LPAIF_I2S_PORT_SEC_MIC = 3,
+ LPAIF_I2S_PORT_MI2S = 4,
+
+ LPAIF_I2S_PORT_MAX = 4,
+ LPAIF_I2S_PORT_NUM = 5,
+};
+
+#define LPAIF_I2SCTL_REG(port) LPAIF_I2SCTL_REG_ADDR(0x0, (port))
+
+#define LPAIF_I2SCTL_LOOPBACK_MASK 0x8000
+#define LPAIF_I2SCTL_LOOPBACK_SHIFT 15
+#define LPAIF_I2SCTL_LOOPBACK_DISABLE (0 << LPAIF_I2SCTL_LOOPBACK_SHIFT)
+#define LPAIF_I2SCTL_LOOPBACK_ENABLE (1 << LPAIF_I2SCTL_LOOPBACK_SHIFT)
+
+#define LPAIF_I2SCTL_SPKEN_MASK 0x4000
+#define LPAIF_I2SCTL_SPKEN_SHIFT 14
+#define LPAIF_I2SCTL_SPKEN_DISABLE (0 << LPAIF_I2SCTL_SPKEN_SHIFT)
+#define LPAIF_I2SCTL_SPKEN_ENABLE (1 << LPAIF_I2SCTL_SPKEN_SHIFT)
+
+#define LPAIF_I2SCTL_SPKMODE_MASK 0x3C00
+#define LPAIF_I2SCTL_SPKMODE_SHIFT 10
+#define LPAIF_I2SCTL_SPKMODE_NONE (0 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_SD0 (1 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_SD1 (2 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_SD2 (3 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_SD3 (4 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_QUAD01 (5 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_QUAD23 (6 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_6CH (7 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+#define LPAIF_I2SCTL_SPKMODE_8CH (8 << LPAIF_I2SCTL_SPKMODE_SHIFT)
+
+#define LPAIF_I2SCTL_SPKMONO_MASK 0x0200
+#define LPAIF_I2SCTL_SPKMONO_SHIFT 9
+#define LPAIF_I2SCTL_SPKMONO_STEREO (0 << LPAIF_I2SCTL_SPKMONO_SHIFT)
+#define LPAIF_I2SCTL_SPKMONO_MONO (1 << LPAIF_I2SCTL_SPKMONO_SHIFT)
+
+#define LPAIF_I2SCTL_WSSRC_MASK 0x0004
+#define LPAIF_I2SCTL_WSSRC_SHIFT 2
+#define LPAIF_I2SCTL_WSSRC_INTERNAL (0 << LPAIF_I2SCTL_WSSRC_SHIFT)
+#define LPAIF_I2SCTL_WSSRC_EXTERNAL (1 << LPAIF_I2SCTL_WSSRC_SHIFT)
+
+#define LPAIF_I2SCTL_BITWIDTH_MASK 0x0003
+#define LPAIF_I2SCTL_BITWIDTH_SHIFT 0
+#define LPAIF_I2SCTL_BITWIDTH_16 (0 << LPAIF_I2SCTL_BITWIDTH_SHIFT)
+#define LPAIF_I2SCTL_BITWIDTH_24 (1 << LPAIF_I2SCTL_BITWIDTH_SHIFT)
+#define LPAIF_I2SCTL_BITWIDTH_32 (2 << LPAIF_I2SCTL_BITWIDTH_SHIFT)
+
+/* LPAIF IRQ */
+
+#define LPAIF_IRQ_REG_BASE 0x3000
+#define LPAIF_IRQ_REG_STRIDE 0x1000
+#define LPAIF_IRQ_REG_ADDR(addr, port) \
+ (LPAIF_IRQ_REG_BASE + (addr) + (LPAIF_IRQ_REG_STRIDE * (port)))
+
+enum lpaif_irq_ports {
+ LPAIF_IRQ_PORT_MIN = 0,
+
+ LPAIF_IRQ_PORT_HOST = 0,
+ LPAIF_IRQ_PORT_ADSP = 1,
+
+ LPAIF_IRQ_PORT_MAX = 2,
+ LPAIF_IRQ_PORT_NUM = 3,
+};
+
+#define LPAIF_IRQEN_REG(port) LPAIF_IRQ_REG_ADDR(0x0, (port))
+#define LPAIF_IRQSTAT_REG(port) LPAIF_IRQ_REG_ADDR(0x4, (port))
+#define LPAIF_IRQCLEAR_REG(port) LPAIF_IRQ_REG_ADDR(0xC, (port))
+
+#define LPAIF_IRQ_BITSTRIDE 3
+#define LPAIF_IRQ_PER(chan) (1 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+#define LPAIF_IRQ_XRUN(chan) (2 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+#define LPAIF_IRQ_ERR(chan) (4 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+#define LPAIF_IRQ_ALL(chan) (7 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+
+/* LPAIF DMA */
+
+#define LPAIF_RDMA_REG_BASE 0x6000
+#define LPAIF_RDMA_REG_STRIDE 0x1000
+#define LPAIF_RDMA_REG_ADDR(addr, chan) \
+ (LPAIF_RDMA_REG_BASE + (addr) + (LPAIF_RDMA_REG_STRIDE * (chan)))
+
+enum lpaif_dma_channels {
+ LPAIF_RDMA_CHAN_MIN = 0,
+
+ LPAIF_RDMA_CHAN_MI2S = 0,
+ LPAIF_RDMA_CHAN_PCM0 = 1,
+ LPAIF_RDMA_CHAN_PCM1 = 2,
+
+ LPAIF_RDMA_CHAN_MAX = 4,
+ LPAIF_RDMA_CHAN_NUM = 5,
+};
+
+#define LPAIF_RDMACTL_REG(chan) LPAIF_RDMA_REG_ADDR(0x00, (chan))
+#define LPAIF_RDMABASE_REG(chan) LPAIF_RDMA_REG_ADDR(0x04, (chan))
+#define LPAIF_RDMABUFF_REG(chan) LPAIF_RDMA_REG_ADDR(0x08, (chan))
+#define LPAIF_RDMACURR_REG(chan) LPAIF_RDMA_REG_ADDR(0x0C, (chan))
+#define LPAIF_RDMAPER_REG(chan) LPAIF_RDMA_REG_ADDR(0x10, (chan))
+
+#define LPAIF_RDMACTL_BURSTEN_MASK 0x800
+#define LPAIF_RDMACTL_BURSTEN_SHIFT 11
+#define LPAIF_RDMACTL_BURSTEN_SINGLE (0 << LPAIF_RDMACTL_BURSTEN_SHIFT)
+#define LPAIF_RDMACTL_BURSTEN_INCR4 (1 << LPAIF_RDMACTL_BURSTEN_SHIFT)
+
+#define LPAIF_RDMACTL_WPSCNT_MASK 0x700
+#define LPAIF_RDMACTL_WPSCNT_SHIFT 8
+#define LPAIF_RDMACTL_WPSCNT_ONE (0 << LPAIF_RDMACTL_WPSCNT_SHIFT)
+#define LPAIF_RDMACTL_WPSCNT_TWO (1 << LPAIF_RDMACTL_WPSCNT_SHIFT)
+#define LPAIF_RDMACTL_WPSCNT_THREE (2 << LPAIF_RDMACTL_WPSCNT_SHIFT)
+#define LPAIF_RDMACTL_WPSCNT_FOUR (3 << LPAIF_RDMACTL_WPSCNT_SHIFT)
+#define LPAIF_RDMACTL_WPSCNT_SIX (5 << LPAIF_RDMACTL_WPSCNT_SHIFT)
+#define LPAIF_RDMACTL_WPSCNT_EIGHT (7 << LPAIF_RDMACTL_WPSCNT_SHIFT)
+
+#define LPAIF_RDMACTL_AUDINTF_MASK 0x0F0
+#define LPAIF_RDMACTL_AUDINTF_SHIFT 4
+#define LPAIF_RDMACTL_AUDINTF_NONE (0 << LPAIF_RDMACTL_AUDINTF_SHIFT)
+#define LPAIF_RDMACTL_AUDINTF_CODEC (1 << LPAIF_RDMACTL_AUDINTF_SHIFT)
+#define LPAIF_RDMACTL_AUDINTF_PCM (2 << LPAIF_RDMACTL_AUDINTF_SHIFT)
+#define LPAIF_RDMACTL_AUDINTF_SEC_I2S (3 << LPAIF_RDMACTL_AUDINTF_SHIFT)
+#define LPAIF_RDMACTL_AUDINTF_MI2S (4 << LPAIF_RDMACTL_AUDINTF_SHIFT)
+#define LPAIF_RDMACTL_AUDINTF_HDMI (5 << LPAIF_RDMACTL_AUDINTF_SHIFT)
+#define LPAIF_RDMACTL_AUDINTF_SEC_PCM (7 << LPAIF_RDMACTL_AUDINTF_SHIFT)
+
+#define LPAIF_RDMACTL_FIFOWM_MASK 0x00E
+#define LPAIF_RDMACTL_FIFOWM_SHIFT 1
+#define LPAIF_RDMACTL_FIFOWM_1 (0 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+#define LPAIF_RDMACTL_FIFOWM_2 (1 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+#define LPAIF_RDMACTL_FIFOWM_3 (2 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+#define LPAIF_RDMACTL_FIFOWM_4 (3 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+#define LPAIF_RDMACTL_FIFOWM_5 (4 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+#define LPAIF_RDMACTL_FIFOWM_6 (5 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+#define LPAIF_RDMACTL_FIFOWM_7 (6 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+#define LPAIF_RDMACTL_FIFOWM_8 (7 << LPAIF_RDMACTL_FIFOWM_SHIFT)
+
+#define LPAIF_RDMACTL_ENABLE_MASK 0x1
+#define LPAIF_RDMACTL_ENABLE_SHIFT 0
+#define LPAIF_RDMACTL_ENABLE_OFF (0 << LPAIF_RDMACTL_ENABLE_SHIFT)
+#define LPAIF_RDMACTL_ENABLE_ON (1 << LPAIF_RDMACTL_ENABLE_SHIFT)
+
+#endif /* __LPASS_LPAIF_H__ */
diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h
new file mode 100644
index 0000000000000000000000000000000000000000..315b981ef89dbe5ab060a58b2cce79c7704c32ed
--- /dev/null
+++ b/sound/soc/qcom/lpass.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * lpass.h - Definitions for the QTi LPASS
+ */
+
+#ifndef __LPASS_H__
+#define __LPASS_H__
+
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define LPASS_AHBIX_CLOCK_FREQUENCY 131072
+
+/* Both the CPU DAI and platform drivers will access this data */
+struct lpass_data {
+
+ /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
+ struct clk *ahbix_clk;
+
+ /* MI2S system clock */
+ struct clk *mi2s_osr_clk;
+
+ /* MI2S bit clock (derived from system clock by a divider */
+ struct clk *mi2s_bit_clk;
+
+ /* low-power audio interface (LPAIF) registers */
+ void __iomem *lpaif;
+
+ /* regmap backed by the low-power audio interface (LPAIF) registers */
+ struct regmap *lpaif_map;
+
+ /* interrupts from the low-power audio interface (LPAIF) */
+ int lpaif_irq;
+};
+
+/* register the platform driver from the CPU DAI driver */
+int asoc_qcom_lpass_platform_register(struct platform_device *);
+
+#endif /* __LPASS_H__ */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [Patch V5 07/12] ASoC: ipq806x: Add LPASS CPU DAI driver
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
` (2 preceding siblings ...)
[not found] ` <1423707015-14527-1-git-send-email-kwestfie-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 08/12] ASoC: ipq806x: Add LPASS platform driver Kenneth Westfield
` (4 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Add the CPU DAI driver for the Qualcomm
Technologies low-power audio subsystem (LPASS).
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
sound/soc/qcom/lpass-cpu.c | 481 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 481 insertions(+)
create mode 100644 sound/soc/qcom/lpass-cpu.c
diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
new file mode 100644
index 0000000000000000000000000000000000000000..c178142989abce9c46565fccbaf3b140cb289b19
--- /dev/null
+++ b/sound/soc/qcom/lpass-cpu.c
@@ -0,0 +1,481 @@
+/*
+ * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * lpass-cpu.c -- ALSA SoC CPU DAI driver for QTi LPASS
+ */
+
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <linux/regmap.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+#include "lpass-lpaif-ipq806x.h"
+#include "lpass.h"
+
+static int lpass_cpu_daiops_set_sysclk(struct snd_soc_dai *dai, int clk_id,
+ unsigned int freq, int dir)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ int ret;
+
+ ret = clk_set_rate(drvdata->mi2s_osr_clk, freq);
+ if (ret)
+ dev_err(dai->dev, "%s() error setting mi2s osrclk to %u: %d\n",
+ __func__, freq, ret);
+
+ return ret;
+}
+
+static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ int ret;
+
+ ret = clk_prepare_enable(drvdata->mi2s_osr_clk);
+ if (ret) {
+ dev_err(dai->dev, "%s() error in enabling mi2s osr clk: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(drvdata->mi2s_bit_clk);
+ if (ret) {
+ dev_err(dai->dev, "%s() error in enabling mi2s bit clk: %d\n",
+ __func__, ret);
+ clk_disable_unprepare(drvdata->mi2s_osr_clk);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+
+ clk_disable_unprepare(drvdata->mi2s_bit_clk);
+ clk_disable_unprepare(drvdata->mi2s_osr_clk);
+}
+
+static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ snd_pcm_format_t format = params_format(params);
+ unsigned int channels = params_channels(params);
+ unsigned int rate = params_rate(params);
+ unsigned int regval;
+ int bitwidth, ret;
+
+ bitwidth = snd_pcm_format_width(format);
+ if (bitwidth < 0) {
+ dev_err(dai->dev, "%s() invalid bit width given: %d\n",
+ __func__, bitwidth);
+ return bitwidth;
+ }
+
+ regval = LPAIF_I2SCTL_LOOPBACK_DISABLE |
+ LPAIF_I2SCTL_WSSRC_INTERNAL;
+
+ switch (bitwidth) {
+ case 16:
+ regval |= LPAIF_I2SCTL_BITWIDTH_16;
+ break;
+ case 24:
+ regval |= LPAIF_I2SCTL_BITWIDTH_24;
+ break;
+ case 32:
+ regval |= LPAIF_I2SCTL_BITWIDTH_32;
+ break;
+ default:
+ dev_err(dai->dev, "%s() invalid bitwidth given: %d\n",
+ __func__, bitwidth);
+ return -EINVAL;
+ }
+
+ switch (channels) {
+ case 1:
+ regval |= LPAIF_I2SCTL_SPKMODE_SD0;
+ regval |= LPAIF_I2SCTL_SPKMONO_MONO;
+ break;
+ case 2:
+ regval |= LPAIF_I2SCTL_SPKMODE_SD0;
+ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ break;
+ case 4:
+ regval |= LPAIF_I2SCTL_SPKMODE_QUAD01;
+ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ break;
+ case 6:
+ regval |= LPAIF_I2SCTL_SPKMODE_6CH;
+ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ break;
+ case 8:
+ regval |= LPAIF_I2SCTL_SPKMODE_8CH;
+ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ break;
+ default:
+ dev_err(dai->dev, "%s() invalid channels given: %u\n",
+ __func__, channels);
+ return -EINVAL;
+ }
+
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_I2SCTL_REG(LPAIF_I2S_PORT_MI2S), regval);
+ if (ret) {
+ dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = clk_set_rate(drvdata->mi2s_bit_clk, rate * bitwidth * 2);
+ if (ret) {
+ dev_err(dai->dev, "%s() error setting mi2s bitclk to %u: %d\n",
+ __func__, rate * bitwidth * 2, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int lpass_cpu_daiops_hw_free(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ int ret;
+
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_I2SCTL_REG(LPAIF_I2S_PORT_MI2S), 0);
+ if (ret)
+ dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
+ __func__, ret);
+
+ return ret;
+}
+
+static int lpass_cpu_daiops_prepare(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ int ret;
+
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_I2SCTL_REG(LPAIF_I2S_PORT_MI2S),
+ LPAIF_I2SCTL_SPKEN_MASK, LPAIF_I2SCTL_SPKEN_ENABLE);
+ if (ret)
+ dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
+ __func__, ret);
+
+ return ret;
+}
+
+static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
+ int cmd, struct snd_soc_dai *dai)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ int ret;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_I2SCTL_REG(LPAIF_I2S_PORT_MI2S),
+ LPAIF_I2SCTL_SPKEN_MASK,
+ LPAIF_I2SCTL_SPKEN_ENABLE);
+ if (ret)
+ dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
+ __func__, ret);
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_I2SCTL_REG(LPAIF_I2S_PORT_MI2S),
+ LPAIF_I2SCTL_SPKEN_MASK,
+ LPAIF_I2SCTL_SPKEN_DISABLE);
+ if (ret)
+ dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
+ __func__, ret);
+ break;
+ }
+
+ return ret;
+}
+
+static struct snd_soc_dai_ops lpass_cpu_dai_ops = {
+ .set_sysclk = lpass_cpu_daiops_set_sysclk,
+ .startup = lpass_cpu_daiops_startup,
+ .shutdown = lpass_cpu_daiops_shutdown,
+ .hw_params = lpass_cpu_daiops_hw_params,
+ .hw_free = lpass_cpu_daiops_hw_free,
+ .prepare = lpass_cpu_daiops_prepare,
+ .trigger = lpass_cpu_daiops_trigger,
+};
+
+static int lpass_cpu_dai_probe(struct snd_soc_dai *dai)
+{
+ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ int ret;
+
+ /* ensure audio hardware is disabled */
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_I2SCTL_REG(LPAIF_I2S_PORT_MI2S), 0);
+ if (ret)
+ dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n",
+ __func__, ret);
+
+ return ret;
+}
+
+static struct snd_soc_dai_driver lpass_cpu_dai_driver = {
+ .playback = {
+ .stream_name = "lpass-cpu-playback",
+ .formats = SNDRV_PCM_FMTBIT_S16 |
+ SNDRV_PCM_FMTBIT_S24 |
+ SNDRV_PCM_FMTBIT_S32,
+ .rates = SNDRV_PCM_RATE_8000 |
+ SNDRV_PCM_RATE_16000 |
+ SNDRV_PCM_RATE_32000 |
+ SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_96000,
+ .rate_min = 8000,
+ .rate_max = 96000,
+ .channels_min = 1,
+ .channels_max = 8,
+ },
+ .probe = &lpass_cpu_dai_probe,
+ .ops = &lpass_cpu_dai_ops,
+};
+
+static const struct snd_soc_component_driver lpass_cpu_comp_driver = {
+ .name = "lpass-cpu",
+};
+
+static bool lpass_cpu_regmap_writeable(struct device *dev, unsigned int reg)
+{
+ int i;
+
+ for (i = 0; i < LPAIF_I2S_PORT_NUM; ++i)
+ if (reg == LPAIF_I2SCTL_REG(i))
+ return true;
+
+ for (i = 0; i < LPAIF_IRQ_PORT_NUM; ++i) {
+ if (reg == LPAIF_IRQEN_REG(i))
+ return true;
+ if (reg == LPAIF_IRQCLEAR_REG(i))
+ return true;
+ }
+
+ for (i = 0; i < LPAIF_RDMA_CHAN_NUM; ++i) {
+ if (reg == LPAIF_RDMACTL_REG(i))
+ return true;
+ if (reg == LPAIF_RDMABASE_REG(i))
+ return true;
+ if (reg == LPAIF_RDMABUFF_REG(i))
+ return true;
+ if (reg == LPAIF_RDMAPER_REG(i))
+ return true;
+ }
+
+ return false;
+}
+
+static bool lpass_cpu_regmap_readable(struct device *dev, unsigned int reg)
+{
+ int i;
+
+ for (i = 0; i < LPAIF_I2S_PORT_NUM; ++i)
+ if (reg == LPAIF_I2SCTL_REG(i))
+ return true;
+
+ for (i = 0; i < LPAIF_IRQ_PORT_NUM; ++i) {
+ if (reg == LPAIF_IRQEN_REG(i))
+ return true;
+ if (reg == LPAIF_IRQSTAT_REG(i))
+ return true;
+ }
+
+ for (i = 0; i < LPAIF_RDMA_CHAN_NUM; ++i) {
+ if (reg == LPAIF_RDMACTL_REG(i))
+ return true;
+ if (reg == LPAIF_RDMABASE_REG(i))
+ return true;
+ if (reg == LPAIF_RDMABUFF_REG(i))
+ return true;
+ if (reg == LPAIF_RDMACURR_REG(i))
+ return true;
+ if (reg == LPAIF_RDMAPER_REG(i))
+ return true;
+ }
+
+ return false;
+}
+
+static bool lpass_cpu_regmap_volatile(struct device *dev, unsigned int reg)
+{
+ int i;
+
+ for (i = 0; i < LPAIF_IRQ_PORT_NUM; ++i)
+ if (reg == LPAIF_IRQSTAT_REG(i))
+ return true;
+
+ for (i = 0; i < LPAIF_RDMA_CHAN_NUM; ++i)
+ if (reg == LPAIF_RDMACURR_REG(i))
+ return true;
+
+ return false;
+}
+
+static const struct regmap_config lpass_cpu_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = LPAIF_RDMAPER_REG(LPAIF_RDMA_CHAN_MAX),
+ .writeable_reg = lpass_cpu_regmap_writeable,
+ .readable_reg = lpass_cpu_regmap_readable,
+ .volatile_reg = lpass_cpu_regmap_volatile,
+ .cache_type = REGCACHE_FLAT,
+};
+
+static int lpass_cpu_platform_probe(struct platform_device *pdev)
+{
+ struct lpass_data *drvdata;
+ struct resource *res;
+ int ret;
+
+ drvdata = devm_kzalloc(&pdev->dev, sizeof(struct lpass_data),
+ GFP_KERNEL);
+ if (!drvdata)
+ return -ENOMEM;
+ platform_set_drvdata(pdev, drvdata);
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-lpaif");
+ if (!res) {
+ dev_err(&pdev->dev, "%s() error getting resource\n", __func__);
+ return -ENODEV;
+ }
+
+ drvdata->lpaif = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR((void const __force *)drvdata->lpaif)) {
+ dev_err(&pdev->dev, "%s() error mapping reg resource: %ld\n",
+ __func__,
+ PTR_ERR((void const __force *)drvdata->lpaif));
+ return PTR_ERR((void const __force *)drvdata->lpaif);
+ }
+
+ drvdata->lpaif_map = devm_regmap_init_mmio(&pdev->dev, drvdata->lpaif,
+ &lpass_cpu_regmap_config);
+ if (IS_ERR(drvdata->lpaif_map)) {
+ dev_err(&pdev->dev, "%s() error initializing regmap: %ld\n",
+ __func__, PTR_ERR(drvdata->lpaif_map));
+ return PTR_ERR(drvdata->lpaif_map);
+ }
+
+ drvdata->mi2s_osr_clk = devm_clk_get(&pdev->dev, "mi2s-osr-clk");
+ if (IS_ERR(drvdata->mi2s_osr_clk)) {
+ dev_err(&pdev->dev, "%s() error getting mi2s-osr-clk: %ld\n",
+ __func__, PTR_ERR(drvdata->mi2s_osr_clk));
+ return PTR_ERR(drvdata->mi2s_osr_clk);
+ }
+
+ drvdata->mi2s_bit_clk = devm_clk_get(&pdev->dev, "mi2s-bit-clk");
+ if (IS_ERR(drvdata->mi2s_bit_clk)) {
+ dev_err(&pdev->dev, "%s() error getting mi2s-bit-clk: %ld\n",
+ __func__, PTR_ERR(drvdata->mi2s_bit_clk));
+ return PTR_ERR(drvdata->mi2s_bit_clk);
+ }
+
+ drvdata->ahbix_clk = devm_clk_get(&pdev->dev, "ahbix-clk");
+ if (IS_ERR(drvdata->ahbix_clk)) {
+ dev_err(&pdev->dev, "%s() error getting ahbix-clk: %ld\n",
+ __func__, PTR_ERR(drvdata->ahbix_clk));
+ return PTR_ERR(drvdata->ahbix_clk);
+ }
+
+ ret = clk_set_rate(drvdata->ahbix_clk, LPASS_AHBIX_CLOCK_FREQUENCY);
+ if (ret) {
+ dev_err(&pdev->dev, "%s() error setting rate on ahbix_clk: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(drvdata->ahbix_clk);
+ if (ret) {
+ dev_err(&pdev->dev, "%s() Error enabling ahbix_clk: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = devm_snd_soc_register_component(&pdev->dev,
+ &lpass_cpu_comp_driver, &lpass_cpu_dai_driver, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "%s() error registering cpu driver: %d\n",
+ __func__, ret);
+ goto err_clk;
+ }
+
+ ret = asoc_qcom_lpass_platform_register(pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "%s() error registering platform driver: %d\n",
+ __func__, ret);
+ goto err_clk;
+ }
+
+ return 0;
+
+err_clk:
+ clk_disable_unprepare(drvdata->ahbix_clk);
+ return ret;
+}
+
+static int lpass_cpu_platform_remove(struct platform_device *pdev)
+{
+ struct lpass_data *drvdata = platform_get_drvdata(pdev);
+
+ clk_disable_unprepare(drvdata->ahbix_clk);
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id lpass_cpu_device_id[] = {
+ { .compatible = "qcom,lpass-cpu" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, lpass_cpu_device_id);
+#endif
+
+static struct platform_driver lpass_cpu_platform_driver = {
+ .driver = {
+ .name = "lpass-cpu",
+ .of_match_table = of_match_ptr(lpass_cpu_device_id),
+ },
+ .probe = lpass_cpu_platform_probe,
+ .remove = lpass_cpu_platform_remove,
+};
+module_platform_driver(lpass_cpu_platform_driver);
+
+MODULE_DESCRIPTION("QTi LPASS CPU Driver");
+MODULE_LICENSE("GPL v2");
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 16+ messages in thread* [Patch V5 08/12] ASoC: ipq806x: Add LPASS platform driver
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
` (3 preceding siblings ...)
2015-02-12 2:10 ` [Patch V5 07/12] ASoC: ipq806x: Add LPASS CPU DAI driver Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 09/12] ASoC: ipq806x: Add @max98357a machine driver Kenneth Westfield
` (3 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Add platform driver for the Qualcomm Technologies
low-power audio subsystem (LPASS) ports.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
sound/soc/qcom/lpass-platform.c | 526 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 526 insertions(+)
create mode 100644 sound/soc/qcom/lpass-platform.c
diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c
new file mode 100644
index 0000000000000000000000000000000000000000..2fa6280dfb234b213904ad73dfad91c7f575538c
--- /dev/null
+++ b/sound/soc/qcom/lpass-platform.c
@@ -0,0 +1,526 @@
+/*
+ * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * lpass-platform.c -- ALSA SoC platform driver for QTi LPASS
+ */
+
+#include <linux/compiler.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/err.h>
+#include <linux/export.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <sound/memalloc.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <linux/regmap.h>
+#include <sound/soc.h>
+#include "lpass-lpaif-ipq806x.h"
+#include "lpass.h"
+
+#define LPASS_PLATFORM_BUFFER_SIZE (16 * 1024)
+#define LPASS_PLATFORM_PERIODS 2
+
+static struct snd_pcm_hardware lpass_platform_pcm_hardware = {
+ .info = SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_RESUME,
+ .formats = SNDRV_PCM_FMTBIT_S16 |
+ SNDRV_PCM_FMTBIT_S24 |
+ SNDRV_PCM_FMTBIT_S32,
+ .rates = SNDRV_PCM_RATE_8000_192000,
+ .rate_min = 8000,
+ .rate_max = 192000,
+ .channels_min = 1,
+ .channels_max = 8,
+ .buffer_bytes_max = LPASS_PLATFORM_BUFFER_SIZE,
+ .period_bytes_max = LPASS_PLATFORM_BUFFER_SIZE /
+ LPASS_PLATFORM_PERIODS,
+ .period_bytes_min = LPASS_PLATFORM_BUFFER_SIZE /
+ LPASS_PLATFORM_PERIODS,
+ .periods_min = LPASS_PLATFORM_PERIODS,
+ .periods_max = LPASS_PLATFORM_PERIODS,
+ .fifo_size = 0,
+};
+
+static int lpass_platform_pcmops_open(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ int ret;
+
+ snd_soc_set_runtime_hwparams(substream, &lpass_platform_pcm_hardware);
+
+ runtime->dma_bytes = lpass_platform_pcm_hardware.buffer_bytes_max;
+
+ ret = snd_pcm_hw_constraint_integer(runtime,
+ SNDRV_PCM_HW_PARAM_PERIODS);
+ if (ret < 0) {
+ dev_err(soc_runtime->dev, "%s() setting constraints failed: %d\n",
+ __func__, ret);
+ return -EINVAL;
+ }
+
+ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
+
+ return 0;
+}
+
+static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ struct lpass_data *drvdata =
+ snd_soc_platform_get_drvdata(soc_runtime->platform);
+ snd_pcm_format_t format = params_format(params);
+ unsigned int channels = params_channels(params);
+ unsigned int regval;
+ int bitwidth;
+ int ret;
+
+ bitwidth = snd_pcm_format_width(format);
+ if (bitwidth < 0) {
+ dev_err(soc_runtime->dev, "%s() invalid bit width given: %d\n",
+ __func__, bitwidth);
+ return bitwidth;
+ }
+
+ regval = LPAIF_RDMACTL_BURSTEN_INCR4 |
+ LPAIF_RDMACTL_AUDINTF_MI2S |
+ LPAIF_RDMACTL_FIFOWM_8;
+
+ switch (bitwidth) {
+ case 16:
+ switch (channels) {
+ case 1:
+ case 2:
+ regval |= LPAIF_RDMACTL_WPSCNT_ONE;
+ break;
+ case 4:
+ regval |= LPAIF_RDMACTL_WPSCNT_TWO;
+ break;
+ case 6:
+ regval |= LPAIF_RDMACTL_WPSCNT_THREE;
+ break;
+ case 8:
+ regval |= LPAIF_RDMACTL_WPSCNT_FOUR;
+ break;
+ default:
+ dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
+ __func__, bitwidth, channels);
+ return -EINVAL;
+ }
+ break;
+ case 24:
+ case 32:
+ switch (channels) {
+ case 1:
+ regval |= LPAIF_RDMACTL_WPSCNT_ONE;
+ break;
+ case 2:
+ regval |= LPAIF_RDMACTL_WPSCNT_TWO;
+ break;
+ case 4:
+ regval |= LPAIF_RDMACTL_WPSCNT_FOUR;
+ break;
+ case 6:
+ regval |= LPAIF_RDMACTL_WPSCNT_SIX;
+ break;
+ case 8:
+ regval |= LPAIF_RDMACTL_WPSCNT_EIGHT;
+ break;
+ default:
+ dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
+ __func__, bitwidth, channels);
+ return -EINVAL;
+ }
+ break;
+ default:
+ dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n",
+ __func__, bitwidth, channels);
+ return -EINVAL;
+ }
+
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_RDMACTL_REG(LPAIF_RDMA_CHAN_MI2S), regval);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int lpass_platform_pcmops_hw_free(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ struct lpass_data *drvdata =
+ snd_soc_platform_get_drvdata(soc_runtime->platform);
+ int ret;
+
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_RDMACTL_REG(LPAIF_RDMA_CHAN_MI2S), 0);
+ if (ret)
+ dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
+ __func__, ret);
+
+ return ret;
+}
+
+static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ struct lpass_data *drvdata =
+ snd_soc_platform_get_drvdata(soc_runtime->platform);
+ int ret;
+
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_RDMABASE_REG(LPAIF_RDMA_CHAN_MI2S),
+ runtime->dma_addr);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmabase reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_RDMABUFF_REG(LPAIF_RDMA_CHAN_MI2S),
+ (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmabuff reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_RDMAPER_REG(LPAIF_RDMA_CHAN_MI2S),
+ (snd_pcm_lib_period_bytes(substream) >> 2) - 1);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmaper reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_RDMACTL_REG(LPAIF_RDMA_CHAN_MI2S),
+ LPAIF_RDMACTL_ENABLE_MASK, LPAIF_RDMACTL_ENABLE_ON);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream,
+ int cmd)
+{
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ struct lpass_data *drvdata =
+ snd_soc_platform_get_drvdata(soc_runtime->platform);
+ int ret;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ /* clear status before enabling interrupts */
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_IRQCLEAR_REG(LPAIF_IRQ_PORT_HOST),
+ LPAIF_IRQ_ALL(LPAIF_RDMA_CHAN_MI2S));
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_IRQEN_REG(LPAIF_IRQ_PORT_HOST),
+ LPAIF_IRQ_ALL(LPAIF_RDMA_CHAN_MI2S),
+ LPAIF_IRQ_ALL(LPAIF_RDMA_CHAN_MI2S));
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_RDMACTL_REG(LPAIF_RDMA_CHAN_MI2S),
+ LPAIF_RDMACTL_ENABLE_MASK,
+ LPAIF_RDMACTL_ENABLE_ON);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_RDMACTL_REG(LPAIF_RDMA_CHAN_MI2S),
+ LPAIF_RDMACTL_ENABLE_MASK,
+ LPAIF_RDMACTL_ENABLE_OFF);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_update_bits(drvdata->lpaif_map,
+ LPAIF_IRQEN_REG(LPAIF_IRQ_PORT_HOST),
+ LPAIF_IRQ_ALL(LPAIF_RDMA_CHAN_MI2S), 0);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+ break;
+ }
+
+ return 0;
+}
+
+static snd_pcm_uframes_t lpass_platform_pcmops_pointer(
+ struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ struct lpass_data *drvdata =
+ snd_soc_platform_get_drvdata(soc_runtime->platform);
+ unsigned int base_addr, curr_addr;
+ int ret;
+
+ ret = regmap_read(drvdata->lpaif_map,
+ LPAIF_RDMABASE_REG(LPAIF_RDMA_CHAN_MI2S), &base_addr);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error reading from rdmabase reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regmap_read(drvdata->lpaif_map,
+ LPAIF_RDMACURR_REG(LPAIF_RDMA_CHAN_MI2S), &curr_addr);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error reading from rdmacurr reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return bytes_to_frames(substream->runtime, curr_addr - base_addr);
+}
+
+static int lpass_platform_pcmops_mmap(struct snd_pcm_substream *substream,
+ struct vm_area_struct *vma)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+
+ return dma_mmap_coherent(substream->pcm->card->dev, vma,
+ runtime->dma_area, runtime->dma_addr,
+ runtime->dma_bytes);
+}
+
+static struct snd_pcm_ops lpass_platform_pcm_ops = {
+ .open = lpass_platform_pcmops_open,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = lpass_platform_pcmops_hw_params,
+ .hw_free = lpass_platform_pcmops_hw_free,
+ .prepare = lpass_platform_pcmops_prepare,
+ .trigger = lpass_platform_pcmops_trigger,
+ .pointer = lpass_platform_pcmops_pointer,
+ .mmap = lpass_platform_pcmops_mmap,
+};
+
+static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data)
+{
+ struct snd_pcm_substream *substream = data;
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ struct lpass_data *drvdata =
+ snd_soc_platform_get_drvdata(soc_runtime->platform);
+ unsigned int interrupts;
+ irqreturn_t ret = IRQ_NONE;
+ int rv;
+
+ rv = regmap_read(drvdata->lpaif_map,
+ LPAIF_IRQSTAT_REG(LPAIF_IRQ_PORT_HOST), &interrupts);
+ if (rv) {
+ dev_err(soc_runtime->dev, "%s() error reading from irqstat reg: %d\n",
+ __func__, rv);
+ return IRQ_NONE;
+ }
+ interrupts &= LPAIF_IRQ_ALL(LPAIF_RDMA_CHAN_MI2S);
+
+ if (interrupts & LPAIF_IRQ_PER(LPAIF_RDMA_CHAN_MI2S)) {
+ rv = regmap_write(drvdata->lpaif_map,
+ LPAIF_IRQCLEAR_REG(LPAIF_IRQ_PORT_HOST),
+ LPAIF_IRQ_PER(LPAIF_RDMA_CHAN_MI2S));
+ if (rv) {
+ dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
+ __func__, rv);
+ return IRQ_NONE;
+ }
+ snd_pcm_period_elapsed(substream);
+ ret = IRQ_HANDLED;
+ }
+
+ if (interrupts & LPAIF_IRQ_XRUN(LPAIF_RDMA_CHAN_MI2S)) {
+ rv = regmap_write(drvdata->lpaif_map,
+ LPAIF_IRQCLEAR_REG(LPAIF_IRQ_PORT_HOST),
+ LPAIF_IRQ_XRUN(LPAIF_RDMA_CHAN_MI2S));
+ if (rv) {
+ dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
+ __func__, rv);
+ return IRQ_NONE;
+ }
+ dev_warn(soc_runtime->dev, "%s() xrun warning\n", __func__);
+ snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN);
+ ret = IRQ_HANDLED;
+ }
+
+ if (interrupts & LPAIF_IRQ_ERR(LPAIF_RDMA_CHAN_MI2S)) {
+ rv = regmap_write(drvdata->lpaif_map,
+ LPAIF_IRQCLEAR_REG(LPAIF_IRQ_PORT_HOST),
+ LPAIF_IRQ_ERR(LPAIF_RDMA_CHAN_MI2S));
+ if (rv) {
+ dev_err(soc_runtime->dev, "%s() error writing to irqclear reg: %d\n",
+ __func__, rv);
+ return IRQ_NONE;
+ }
+ dev_err(soc_runtime->dev, "%s() bus access error\n", __func__);
+ snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED);
+ ret = IRQ_HANDLED;
+ }
+
+ return ret;
+}
+
+static int lpass_platform_alloc_buffer(struct snd_pcm_substream *substream,
+ struct snd_soc_pcm_runtime *soc_runtime)
+{
+ struct snd_dma_buffer *buf = &substream->dma_buffer;
+ size_t size = lpass_platform_pcm_hardware.buffer_bytes_max;
+
+ buf->dev.type = SNDRV_DMA_TYPE_DEV;
+ buf->dev.dev = soc_runtime->dev;
+ buf->private_data = NULL;
+ buf->area = dma_alloc_coherent(soc_runtime->dev, size, &buf->addr,
+ GFP_KERNEL);
+ if (!buf->area) {
+ dev_err(soc_runtime->dev, "%s: Could not allocate DMA buffer\n",
+ __func__);
+ return -ENOMEM;
+ }
+ buf->bytes = size;
+
+ return 0;
+}
+
+static void lpass_platform_free_buffer(struct snd_pcm_substream *substream,
+ struct snd_soc_pcm_runtime *soc_runtime)
+{
+ struct snd_dma_buffer *buf = &substream->dma_buffer;
+
+ if (buf->area) {
+ dma_free_coherent(soc_runtime->dev, buf->bytes, buf->area,
+ buf->addr);
+ }
+ buf->area = NULL;
+}
+
+static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime)
+{
+ struct snd_pcm *pcm = soc_runtime->pcm;
+ struct snd_pcm_substream *substream =
+ pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
+ struct lpass_data *drvdata =
+ snd_soc_platform_get_drvdata(soc_runtime->platform);
+ int ret;
+
+ soc_runtime->dev->coherent_dma_mask = DMA_BIT_MASK(32);
+ soc_runtime->dev->dma_mask = &soc_runtime->dev->coherent_dma_mask;
+
+ ret = lpass_platform_alloc_buffer(substream, soc_runtime);
+ if (ret)
+ return ret;
+
+ ret = devm_request_irq(soc_runtime->dev, drvdata->lpaif_irq,
+ lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING,
+ "lpass-irq-lpaif", substream);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() irq request failed: %d\n",
+ __func__, ret);
+ goto err_buf;
+ }
+
+ /* ensure audio hardware is disabled */
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_IRQEN_REG(LPAIF_IRQ_PORT_HOST), 0);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+ ret = regmap_write(drvdata->lpaif_map,
+ LPAIF_RDMACTL_REG(LPAIF_RDMA_CHAN_MI2S), 0);
+ if (ret) {
+ dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+
+err_buf:
+ lpass_platform_free_buffer(substream, soc_runtime);
+ return ret;
+}
+
+static void lpass_platform_pcm_free(struct snd_pcm *pcm)
+{
+ struct snd_pcm_substream *substream =
+ pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+
+ lpass_platform_free_buffer(substream, soc_runtime);
+}
+
+static struct snd_soc_platform_driver lpass_platform_driver = {
+ .pcm_new = lpass_platform_pcm_new,
+ .pcm_free = lpass_platform_pcm_free,
+ .ops = &lpass_platform_pcm_ops,
+};
+
+int asoc_qcom_lpass_platform_register(struct platform_device *pdev)
+{
+ struct lpass_data *drvdata = platform_get_drvdata(pdev);
+
+ drvdata->lpaif_irq = platform_get_irq_byname(pdev, "lpass-irq-lpaif");
+ if (drvdata->lpaif_irq < 0) {
+ dev_err(&pdev->dev, "%s() error getting irq handle: %d\n",
+ __func__, drvdata->lpaif_irq);
+ return -ENODEV;
+ }
+
+ return devm_snd_soc_register_platform(&pdev->dev,
+ &lpass_platform_driver);
+}
+EXPORT_SYMBOL_GPL(asoc_qcom_lpass_platform_register);
+
+MODULE_DESCRIPTION("QTi LPASS Platform Driver");
+MODULE_LICENSE("GPL v2");
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 16+ messages in thread* [Patch V5 09/12] ASoC: ipq806x: Add @max98357a machine driver
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
` (4 preceding siblings ...)
2015-02-12 2:10 ` [Patch V5 08/12] ASoC: ipq806x: Add LPASS platform driver Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 10/12] ASoC: qcom: Add ability to build QCOM drivers Kenneth Westfield
` (2 subsequent siblings)
8 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Add machine driver for the boards with the IPQ806X
SOC connected to the MAX98357A DAC.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
sound/soc/qcom/ipq806x-max98357a.c | 171 +++++++++++++++++++++++++++++++++++++
1 file changed, 171 insertions(+)
create mode 100644 sound/soc/qcom/ipq806x-max98357a.c
diff --git a/sound/soc/qcom/ipq806x-max98357a.c b/sound/soc/qcom/ipq806x-max98357a.c
new file mode 100644
index 0000000000000000000000000000000000000000..af92e9ffa42104d6e29160b9e0ffedc820388c7c
--- /dev/null
+++ b/sound/soc/qcom/ipq806x-max98357a.c
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * ipq806x-max98357a.c -- ALSA SoC machine driver for QTi ipq806x SOC with
+ * MAX98357a DAC
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+
+#define IPQ806X_MAX98357A_SYSCLK_MULT 4
+
+static int ipq806x_max98357a_ops_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
+ struct snd_soc_card *card = soc_runtime->card;
+ snd_pcm_format_t format = params_format(params);
+ unsigned int rate = params_rate(params);
+ unsigned int sysclk_freq;
+ int bitwidth, ret;
+
+ bitwidth = snd_pcm_format_width(format);
+ if (bitwidth < 0) {
+ dev_err(card->dev, "%s() invalid bit width given: %d\n",
+ __func__, bitwidth);
+ return bitwidth;
+ }
+
+ /*
+ * as the CPU DAI is the I2S bus master and no system clock is needed by
+ * the MAX98357a DAC, simply set the system clock to be a constant
+ * multiple of the bit clock for the clock divider
+ */
+ sysclk_freq = rate * bitwidth * 2 * IPQ806X_MAX98357A_SYSCLK_MULT;
+
+ ret = snd_soc_dai_set_sysclk(soc_runtime->cpu_dai, 0, sysclk_freq, 0);
+ if (ret) {
+ dev_err(card->dev, "%s() error setting sysclk to %u: %d\n",
+ __func__, sysclk_freq, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static struct snd_soc_ops ipq806x_max98357a_soc_ops = {
+ .hw_params = ipq806x_max98357a_ops_hw_params,
+};
+
+static struct snd_soc_dai_link ipq806x_max98357a_dai_link = {
+ .name = "IPQ806x Media1",
+ .stream_name = "MultiMedia1",
+ .ops = &ipq806x_max98357a_soc_ops,
+};
+
+static struct snd_soc_card ipq806x_max98357a_soc_card = {
+ .name = "ipq806x-max98357a",
+ .dev = NULL,
+};
+
+static int ipq806x_max98357a_parse_of(struct snd_soc_card *card)
+{
+ struct snd_soc_dai_link *dai_link = card->dai_link;
+ struct device_node *np = card->dev->of_node;
+ int ret;
+
+ dai_link->cpu_of_node = of_parse_phandle(np, "cpu", 0);
+ if (!dai_link->cpu_of_node) {
+ dev_err(card->dev, "%s() error getting cpu phandle\n",
+ __func__);
+ return -EINVAL;
+ }
+ dai_link->platform_of_node = dai_link->cpu_of_node;
+
+ dai_link->codec_of_node = of_parse_phandle(np, "codec", 0);
+ if (!dai_link->codec_of_node) {
+ dev_err(card->dev, "%s() error getting codec phandle\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ ret = of_property_read_string(np, "codec-dai",
+ &dai_link->codec_dai_name);
+ if (ret) {
+ dev_err(card->dev, "%s() error getting codec-dai: %d\n",
+ __func__, ret);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int ipq806x_max98357a_platform_probe(struct platform_device *pdev)
+{
+ struct snd_soc_card *card = &ipq806x_max98357a_soc_card;
+ int ret;
+
+ if (card->dev) {
+ dev_err(&pdev->dev, "%s() error, existing soundcard\n",
+ __func__);
+ return -ENODEV;
+ }
+ card->dev = &pdev->dev;
+ platform_set_drvdata(pdev, card);
+
+ ret = snd_soc_of_parse_card_name(card, "qcom,model");
+ if (ret) {
+ dev_err(&pdev->dev, "%s() error parsing card name: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ card->dai_link = &ipq806x_max98357a_dai_link;
+ card->num_links = 1;
+
+ ret = ipq806x_max98357a_parse_of(card);
+ if (ret) {
+ dev_err(&pdev->dev, "%s() error resolving dai links: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = devm_snd_soc_register_card(&pdev->dev, card);
+ if (ret == -EPROBE_DEFER) {
+ card->dev = NULL;
+ return ret;
+ } else if (ret) {
+ dev_err(&pdev->dev, "%s() error registering soundcard: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id ipq806x_max98357a_device_id[] = {
+ { .compatible = "qcom,ipq806x-max98357a" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ipq806x_max98357a_device_id);
+#endif
+
+static struct platform_driver ipq806x_max98357a_platform_driver = {
+ .driver = {
+ .name = "ipq806x-max98357a",
+ .of_match_table =
+ of_match_ptr(ipq806x_max98357a_device_id),
+ },
+ .probe = ipq806x_max98357a_platform_probe,
+};
+module_platform_driver(ipq806x_max98357a_platform_driver);
+
+MODULE_DESCRIPTION("QTi ipq806x-max98357a Machine Driver");
+MODULE_LICENSE("GPL v2");
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 16+ messages in thread* [Patch V5 10/12] ASoC: qcom: Add ability to build QCOM drivers
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
` (5 preceding siblings ...)
2015-02-12 2:10 ` [Patch V5 09/12] ASoC: ipq806x: Add @max98357a machine driver Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 11/12] ASoC: Allow for building " Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 12/12] ARM: dts: Model IPQ LPASS audio hardware Kenneth Westfield
8 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Define the LPASS platform driver and the LPASS
CPU DAI driver configuration, and how to build
them.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
sound/soc/qcom/Kconfig | 26 ++++++++++++++++++++++++++
sound/soc/qcom/Makefile | 11 +++++++++++
2 files changed, 37 insertions(+)
create mode 100644 sound/soc/qcom/Kconfig
create mode 100644 sound/soc/qcom/Makefile
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
new file mode 100644
index 0000000000000000000000000000000000000000..803fc204d65ae1916f30477bdaf926b650320c8a
--- /dev/null
+++ b/sound/soc/qcom/Kconfig
@@ -0,0 +1,26 @@
+config SND_SOC_QCOM
+ tristate "SoC Audio support for QCOM platforms"
+ help
+ Support for audio in Qualcomm Technologies SOC-based systems.
+ Say Y if you want to use audio devices such as I2S, PCM,
+ S/PDIF, etc.
+
+config SND_SOC_LPASS_CPU
+ tristate
+ depends on SND_SOC_QCOM
+
+config SND_SOC_IPQ806X_MAX98357A
+ tristate "SoC Audio support for IPQ806x based platforms"
+ depends on SND_SOC_QCOM || ARCH_QCOM || COMPILE_TEST
+ select SND_SOC_LPASS_CPU
+ select SND_SOC_LPASS_PLATFORM
+ select SND_SOC_MAX98357A
+ help
+ Support for Qualcomm Technologies LPASS audio block in
+ IPQ806X SOC-based systems.
+ Say Y if you want to use audio devices such as I2S, PCM,
+ S/PDIF, etc.
+
+config SND_SOC_LPASS_PLATFORM
+ tristate
+ depends on SND_SOC_QCOM
diff --git a/sound/soc/qcom/Makefile b/sound/soc/qcom/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..b2811496b0df654a451c0dc231ab5bff84ca2850
--- /dev/null
+++ b/sound/soc/qcom/Makefile
@@ -0,0 +1,11 @@
+# Platform
+snd-soc-lpass-cpu-objs := lpass-cpu.o
+snd-soc-lpass-platform-objs := lpass-platform.o
+
+obj-$(CONFIG_SND_SOC_LPASS_CPU) += snd-soc-lpass-cpu.o
+obj-$(CONFIG_SND_SOC_LPASS_PLATFORM) += snd-soc-lpass-platform.o
+
+# Machine
+snd-soc-ipq806x-max98357a-objs := ipq806x-max98357a.o
+
+obj-$(CONFIG_SND_SOC_IPQ806X_MAX98357A) += snd-soc-ipq806x-max98357a.o
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 16+ messages in thread* [Patch V5 11/12] ASoC: Allow for building QCOM drivers
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
` (6 preceding siblings ...)
2015-02-12 2:10 ` [Patch V5 10/12] ASoC: qcom: Add ability to build QCOM drivers Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
2015-02-12 2:10 ` [Patch V5 12/12] ARM: dts: Model IPQ LPASS audio hardware Kenneth Westfield
8 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Allow for the Qualcomm Technologies ASoC drivers
to build.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
2 files changed, 2 insertions(+)
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index 7d5d6444a83737ffa3c01acbe1925de619e0390a..b98eebf0e30bba19ec24acc7f0e6ab155e5e602b 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -47,6 +47,7 @@ source "sound/soc/kirkwood/Kconfig"
source "sound/soc/intel/Kconfig"
source "sound/soc/mxs/Kconfig"
source "sound/soc/pxa/Kconfig"
+source "sound/soc/qcom/Kconfig"
source "sound/soc/rockchip/Kconfig"
source "sound/soc/samsung/Kconfig"
source "sound/soc/sh/Kconfig"
diff --git a/sound/soc/Makefile b/sound/soc/Makefile
index 865e090c80616024a552da5e33d2796b9be1dbbd..3d78a8d874dc98dd6219b33e3f2c100ef0334bfc 100644
--- a/sound/soc/Makefile
+++ b/sound/soc/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_SND_SOC) += nuc900/
obj-$(CONFIG_SND_SOC) += omap/
obj-$(CONFIG_SND_SOC) += kirkwood/
obj-$(CONFIG_SND_SOC) += pxa/
+obj-$(CONFIG_SND_SOC) += qcom/
obj-$(CONFIG_SND_SOC) += rockchip/
obj-$(CONFIG_SND_SOC) += samsung/
obj-$(CONFIG_SND_SOC) += sh/
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 16+ messages in thread* [Patch V5 12/12] ARM: dts: Model IPQ LPASS audio hardware
2015-02-12 2:10 [Patch V5 00/12] ASoC: QCOM: Add support for ipq806x SOC Kenneth Westfield
` (7 preceding siblings ...)
2015-02-12 2:10 ` [Patch V5 11/12] ASoC: Allow for building " Kenneth Westfield
@ 2015-02-12 2:10 ` Kenneth Westfield
8 siblings, 0 replies; 16+ messages in thread
From: Kenneth Westfield @ 2015-02-12 2:10 UTC (permalink / raw)
To: Mark Brown, Takashi Iwai, Liam Girdwood, David Brown,
Bryan Huntsman, Greg KH, Banajit Goswami, Patrick Lai
Cc: ALSA Mailing List, Device Tree Mailing List, MSM Mailing List,
Kenneth Westfield
From: Kenneth Westfield <kwestfie@codeaurora.org>
Model the Qualcomm Technologies LPASS hardware for
the ipq806x SOC.
Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 63b2146f563b541e4994697af5ee1bbb41a4abd1..f9b1cf2737e61c5e428cfef19cfd013395138a52 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -2,6 +2,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
#include <dt-bindings/soc/qcom,gsbi.h>
/ {
@@ -96,6 +97,21 @@
cpu-offset = <0x80000>;
};
+ lpass@28100000 {
+ compatible = "qcom,lpass-cpu";
+ status = "disabled";
+ clocks = <&lcc AHBIX_CLK>,
+ <&lcc MI2S_OSR_CLK>,
+ <&lcc MI2S_BIT_CLK>;
+ clock-names = "ahbix-clk",
+ "mi2s-osr-clk",
+ "mi2s-bit-clk";
+ interrupts = <0 85 1>;
+ interrupt-names = "lpass-irq-lpaif";
+ reg = <0x28100000 0x10000>;
+ reg-names = "lpass-lpaif";
+ };
+
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
@@ -279,5 +295,12 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+ lcc: clock-controller@28000000 {
+ compatible = "qcom,lcc-ipq8064";
+ reg = <0x28000000 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
};
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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