From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chunyan Zhang Subject: [PATCH] coresight: adding basic support for Spreadtrum SC9836 Date: Tue, 24 Mar 2015 13:48:33 +0800 Message-ID: <1427176113-23411-1-git-send-email-zhang.chunyan@linaro.org> Return-path: Sender: linux-kernel-owner@vger.kernel.org To: arm@kernel.org, arnd@arndb.de Cc: mathieu.poirier@linaro.org, will.deacon@arm.com, mark.rutland@arm.com, robh+dt@kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, catalin.marinas@arm.com, kaixu.xia@linaro.org, zhizhou.zhang@spreadtrum.com, orsonzhai@gmail.com, zhang.lyra@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org Support only for ETB, FUNNEL, STM are included currently. Support for ETM, TPIU and the replicator linked to it are not included in this version patch. Signed-off-by: Chunyan Zhang --- arch/arm64/boot/dts/sprd/sc9836.dtsi | 57 ++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi index f92f1b4..2ca80f3 100644 --- a/arch/arm64/boot/dts/sprd/sc9836.dtsi +++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi @@ -45,6 +45,63 @@ }; }; + etb@10003000 { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0 0x10003000 0 0x1000>; + arm,primecell-periphid = <0x0003b907>; + coresight-default-sink; + clocks = <&clk26mhz>; + clock-names = "apb_pclk"; + port { + etb_in: endpoint { + slave-mode; + remote-endpoint = <&funnel_out_port0>; + }; + }; + }; + + funnel@10001000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x10001000 0 0x1000>; + clocks = <&clk26mhz>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* funnel output port */ + port@0 { + reg = <0>; + funnel_out_port0: endpoint { + remote-endpoint = <&etb_in>; + }; + }; + + /* funnel input port 0~3 is reserved for ETMs */ + port@1 { + reg = <4>; + funnel_in_port4: endpoint { + slave-mode; + remote-endpoint = <&stm_out>; + }; + }; + }; + }; + + stm@10006000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x10006000 0 0x1000>, + <0 0x01000000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + clocks = <&clk26mhz>; + clock-names = "apb_pclk"; + port { + stm_out: endpoint { + remote-endpoint = <&funnel_in_port4>; + }; + }; + }; + gic: interrupt-controller@12001000 { compatible = "arm,gic-400"; reg = <0 0x12001000 0 0x1000>, -- 1.9.1