[PATCHv2 0/4] Add support for Arria10 devkit

[PATCHv2 0/4] Add support for Arria10 devkit

[dinguyen]

From: Dinh Nguyen <dinguyen@opensource.altera.com>

Hi,

This patchset enables and tidy up support for the Arria10 devkit. Along with
this patchset and the patchset for enabling clocks on the Arria10, the devkit
can boot Linux.

V2:
- Patch "ARM: socfpga: dts: enable UART1 for the debug uart" adds the removal
  of unused aliases in the dts file.

- Split out the "Documentation: DT bindings: add doc for Altera's SoCFPGA
  platform" patch.

- Split out the 2 patches for early printk uart.

Thanks,

Dinh Nguyen (4):
  ARM: socfpga: add cpu1-start-addr for Arria 10
  ARM: socfpga: disable the sdmmc, and uart nodes in the base arria10
  ARM: socfpga: dts: enable UART1 for the debug uart
  ARM: socfpga: rename socdk board file to socdk_sdmmc

 arch/arm/boot/dts/Makefile                        |  2 +-
 arch/arm/boot/dts/socfpga_arria10.dtsi            | 16 ++------
 arch/arm/boot/dts/socfpga_arria10_socdk.dts       | 48 -----------------------
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi      | 46 ++++++++++++++++++++++
 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 26 ++++++++++++
 5 files changed, 77 insertions(+), 61 deletions(-)
 delete mode 100755 arch/arm/boot/dts/socfpga_arria10_socdk.dts
 create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
 create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts

-- 
2.2.1

[PATCHv2 1/4] ARM: socfpga: add cpu1-start-addr for Arria 10

[dinguyen]

From: Dinh Nguyen <dinguyen@opensource.altera.com>

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
 arch/arm/boot/dts/socfpga_arria10.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 8a05c47..69d616a 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -284,6 +284,7 @@
 		sysmgr: sysmgr@ffd06000 {
 			compatible = "altr,sys-mgr", "syscon";
 			reg = <0xffd06000 0x300>;
+			cpu1-start-addr = <0xffd06230>;
 		};
 
 		/* Local timer */
-- 
2.2.1

[PATCHv2 2/4] ARM: socfpga: disable the sdmmc, and uart nodes in the base arria10

[dinguyen]

From: Dinh Nguyen <dinguyen@opensource.altera.com>

Add status = "disabled" in the base DTSI for Arria10.  The SDMMC and uart
nodes should be enabled in the appropriate board file.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
 arch/arm/boot/dts/socfpga_arria10.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 69d616a..d843609 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -268,6 +268,7 @@
 			reg = <0xff808000 0x1000>;
 			interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
 			fifo-depth = <0x400>;
+			status = "disabled";
 		};
 
 		ocram: sram@ffe00000 {
@@ -324,6 +325,7 @@
 			interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			status = "disabled";
 		};
 
 		uart1: serial1@ffc02100 {
@@ -332,6 +334,7 @@
 			interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
+			status = "disabled";
 		};
 
 		usbphy0: usbphy@0 {
-- 
2.2.1

[PATCHv2 3/4] ARM: socfpga: dts: enable UART1 for the debug uart

[dinguyen]

From: Dinh Nguyen <dinguyen@opensource.altera.com>

Arria10 devkit is using UART1 for the debug uart port. Remove
unused aliases.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Add removal of unused aliases
---
 arch/arm/boot/dts/socfpga_arria10.dtsi      | 12 ------------
 arch/arm/boot/dts/socfpga_arria10_socdk.dts |  8 ++++----
 2 files changed, 4 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index d843609..6c3ad92 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -21,18 +21,6 @@
 	#address-cells = <1>;
 	#size-cells = <1>;
 
-	aliases {
-		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
-		ethernet2 = &gmac2;
-		serial0 = &uart0;
-		serial1 = &uart1;
-		timer0 = &timer0;
-		timer1 = &timer1;
-		timer2 = &timer2;
-		timer3 = &timer3;
-	};
-
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dts b/arch/arm/boot/dts/socfpga_arria10_socdk.dts
index 3015ce8..811a61c 100755
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dts
@@ -40,9 +40,9 @@
 				};
 			};
 		};
-
-		serial0@ffc02000 {
-			status = "okay";
-		};
 	};
 };
+
+&uart1 {
+	status = "okay";
+};
-- 
2.2.1

[PATCHv2 4/4] ARM: socfpga: rename socdk board file to socdk_sdmmc

[dinguyen]

From: Dinh Nguyen <dinguyen@opensource.altera.com>

Rename the socfpga_arria10_socdk board file to socfpga_arria10_socdk_sdmmc
as Arria 10 devkit cannot support SDMMC and QSPI at the same time. Thus
we will need to have 2 separate board files, one for SDMMC and one for
QSPI. We also add a new base board dtsi file, socfpga_arria10_socdk.dtsi
so that we use common peripherals for each flavor of the devkits.

Add the sdmmc node to the socfpga_arria10_socdk_sdmmc.dts board file.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
 arch/arm/boot/dts/Makefile                        |  2 +-
 arch/arm/boot/dts/socfpga_arria10_socdk.dts       | 48 -----------------------
 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi      | 46 ++++++++++++++++++++++
 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 26 ++++++++++++
 4 files changed, 73 insertions(+), 49 deletions(-)
 delete mode 100755 arch/arm/boot/dts/socfpga_arria10_socdk.dts
 create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
 create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..e50441a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -485,7 +485,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 	r8a7794-alt.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
-	socfpga_arria10_socdk.dtb \
+	socfpga_arria10_socdk_sdmmc.dtb \
 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb \
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dts b/arch/arm/boot/dts/socfpga_arria10_socdk.dts
deleted file mode 100755
index 811a61c..0000000
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dts
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2014 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/dts-v1/;
-#include "socfpga_arria10.dtsi"
-
-/ {
-	model = "Altera SOCFPGA Arria 10";
-	compatible = "altr,socfpga-arria10", "altr,socfpga";
-
-	chosen {
-		bootargs = "console=ttyS0,115200 rootwait";
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x0 0x40000000>; /* 1GB */
-	};
-
-	soc {
-		clkmgr@ffd04000 {
-			clocks {
-				osc1 {
-					clock-frequency = <25000000>;
-				};
-			};
-		};
-	};
-};
-
-&uart1 {
-	status = "okay";
-};
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
new file mode 100644
index 0000000..347ca4e
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2015 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "socfpga_arria10.dtsi"
+
+/ {
+	model = "Altera SOCFPGA Arria 10";
+	compatible = "altr,socfpga-arria10", "altr,socfpga";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 rootwait";
+	};
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x40000000>; /* 1GB */
+	};
+
+	soc {
+		clkmgr@ffd04000 {
+			clocks {
+				osc1 {
+					clock-frequency = <25000000>;
+				};
+			};
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
new file mode 100644
index 0000000..dbbb751
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2014-2015 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+#include "socfpga_arria10_socdk.dtsi"
+
+&mmc {
+	status = "okay";
+	num-slots = <1>;
+	broken-cd;
+	bus-width = <4>;
+};
-- 
2.2.1