[PATCH 2/2] ARM: vexpress: Add interrupt-affinity

[PATCH 2/2] ARM: vexpress: Add interrupt-affinity

[Robert Schwebel]

Without this property, we get this boot warning:

[    0.459361] CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]

Signed-off-by: Robert Schwebel <r.schwebel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
 arch/arm/boot/dts/vexpress-v2p-ca9.dts | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index a411274..9d71493 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -33,28 +33,28 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		A9_0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0>;
 			next-level-cache = <&L2>;
 		};
 
-		cpu@1 {
+		A9_1: cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <1>;
 			next-level-cache = <&L2>;
 		};
 
-		cpu@2 {
+		A9_2: cpu@2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <2>;
 			next-level-cache = <&L2>;
 		};
 
-		cpu@3 {
+		A9_3: cpu@3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <3>;
@@ -182,6 +182,11 @@
 			     <0 61 4>,
 			     <0 62 4>,
 			     <0 63 4>;
+		interrupt-affinity = <&A9_0>,
+		                     <&A9_1>,
+		                     <&A9_2>,
+		                     <&A9_3>;
+
 	};
 
 	dcc {
-- 
2.1.4

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Re: [PATCH 2/2] ARM: vexpress: Add interrupt-affinity

[Robert Schwebel]

On Thu, Apr 30, 2015 at 07:54:08PM +0200, Robert Schwebel wrote:
> Without this property, we get this boot warning:
> 
> [    0.459361] CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]
> 
> Signed-off-by: Robert Schwebel <r.schwebel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>

However, with this patch applied, the messages above disappear, but I
still get this:

[    0.495280] CPU PMU: Failed to find logical CPU for cpu

on a kernel configured with CONFIG_SMP=n. nr_cpu_ids is 1 there, while 
the loop still loops over all available cores. Ths makes the logic fail.

rsc
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Re: [PATCH 2/2] ARM: vexpress: Add interrupt-affinity

[Sudeep Holla]

On 30/04/15 18:55, Robert Schwebel wrote:
> On Thu, Apr 30, 2015 at 07:54:08PM +0200, Robert Schwebel wrote:
>> Without this property, we get this boot warning:
>>
>> [    0.459361] CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]
>>
>> Signed-off-by: Robert Schwebel <r.schwebel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>

May be you can also mention the commit introducing the change in the log
something like:

"
Commit 9fd85eb502a7 ("ARM: pmu: add support for interrupt-affinity
property") added optional optional "interrupt-affinity" property, to
specify CPU affinity for each SPI listed in the interrupts property.

Without this property, we get this boot warning:
	CPU PMU: Failed to parse <no-node>/interrupt-affinity[0]

This patch add interrupt-affinity to the PMU node in CA9x4 device tree.
"

Otherwise:
Acked-by: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>

>
> However, with this patch applied, the messages above disappear, but I
> still get this:
>
> [    0.495280] CPU PMU: Failed to find logical CPU for cpu
>
> on a kernel configured with CONFIG_SMP=n. nr_cpu_ids is 1 there, while
> the loop still loops over all available cores. Ths makes the logic fail.

This is a different issue. You must also see warning from devtree.c when
parsing CPUs complaining about more CPU nodes found in DT. IIUC the
functionality still works fine.

Regards,
Sudeep
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