* [PATCH v7 0/2] Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller.
@ 2015-05-13 11:51 Suman Tripathi
2015-05-13 11:51 ` [PATCH v7 1/2] arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi Suman Tripathi
[not found] ` <1431517912-10322-1-git-send-email-stripathi-qTEPVZfXA3Y@public.gmane.org>
0 siblings, 2 replies; 6+ messages in thread
From: Suman Tripathi @ 2015-05-13 11:51 UTC (permalink / raw)
To: chris-OsFVWbfNK3isTnJN9+BGXg, anton-9xeibp6oKSgdnm+yROfE0A,
arnd-r2nGTMty4D4, michal.simek-gjFFaj9aHVfQT0dZR+AlfA
Cc: linux-mmc-u79uwXL29TY76Z2rM5mHXA,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
ddutile-H+wXaHxf7aLQT0dZR+AlfA, jcm-H+wXaHxf7aLQT0dZR+AlfA,
mlangsdo-H+wXaHxf7aLQT0dZR+AlfA, patches-qTEPVZfXA3Y,
Suman Tripathi
This patch adds the SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller.
v1 change:
* Use the CONFIG_ARM64_DMA_HAS_IOMMU for dma-mapping.
v2 change:
* Drop the IOMMU support and switching to PIO mode for arasan.
controller integrated inside APM X-Gene SoC.
v3 change:
* Change the sdhci-of-arasan.c to support arasan4.9a.
* Add quirks for arasan4.9a.
v4 change:
* Cleanup the Documentation and dts.
v5 change:
* Rebase the dts files.
* Drop patch 2 and 3 as it is applied.
v6 change:
* Clean the unrequired properties from dts.
* Rename sdhc to sdhci.
* support to disable timming using capability register read.
v7 change:
* Rename sdhci nodes to mmc.
Signed-off-by: Suman Tripathi <stripathi-qTEPVZfXA3Y@public.gmane.org>
---
Suman Tripathi (2):
arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi
mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on
capability register 0.
arch/arm64/boot/dts/apm/apm-mustang.dts | 4 +++
arch/arm64/boot/dts/apm/apm-storm.dtsi | 43 +++++++++++++++++++++++++++++++++
drivers/mmc/host/sdhci.c | 3 ++-
3 files changed, 49 insertions(+), 1 deletion(-)
--
1.8.2.1
--
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v7 1/2] arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi 2015-05-13 11:51 [PATCH v7 0/2] Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller Suman Tripathi @ 2015-05-13 11:51 ` Suman Tripathi 2015-05-18 7:04 ` Suman Tripathi [not found] ` <1431517912-10322-1-git-send-email-stripathi-qTEPVZfXA3Y@public.gmane.org> 1 sibling, 1 reply; 6+ messages in thread From: Suman Tripathi @ 2015-05-13 11:51 UTC (permalink / raw) To: chris, anton, arnd, michal.simek Cc: linux-mmc, linuxppc-dev, devicetree, linux-arm-kernel, ddutile, jcm, mlangsdo, patches, Suman Tripathi This patch adds the arasan mmc nodes to reuse the of-arasan driver for APM X-Gene SoC. Signed-off-by: Suman Tripathi <stripathi@apm.com> --- --- arch/arm64/boot/dts/apm/apm-mustang.dts | 4 +++ arch/arm64/boot/dts/apm/apm-storm.dtsi | 43 +++++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/apm/apm-mustang.dts b/arch/arm64/boot/dts/apm/apm-mustang.dts index 83578e7..7a3ea72 100644 --- a/arch/arm64/boot/dts/apm/apm-mustang.dts +++ b/arch/arm64/boot/dts/apm/apm-mustang.dts @@ -52,3 +52,7 @@ &xgenet { status = "ok"; }; + +&mmc0 { + status = "ok"; +}; diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index c8d3e0e..8e03ecd 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -145,6 +145,40 @@ clock-output-names = "socplldiv2"; }; + ahbclk: ahbclk@1f2ac000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + reg = <0x0 0x1f2ac000 0x0 0x1000 + 0x0 0x17000000 0x0 0x2000>; + reg-names = "csr-reg", "div-reg"; + csr-offset = <0x0>; + csr-mask = <0x1>; + enable-offset = <0x8>; + enable-mask = <0x1>; + divider-offset = <0x164>; + divider-width = <0x5>; + divider-shift = <0x0>; + clock-output-names = "ahbclk"; + }; + + sdioclk: sdioclk@1f2ac000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + reg = <0x0 0x1f2ac000 0x0 0x1000 + 0x0 0x17000000 0x0 0x2000>; + reg-names = "csr-reg", "div-reg"; + csr-offset = <0x0>; + csr-mask = <0x2>; + enable-offset = <0x8>; + enable-mask = <0x2>; + divider-offset = <0x178>; + divider-width = <0x8>; + divider-shift = <0x0>; + clock-output-names = "sdioclk"; + }; + qmlclk: qmlclk { compatible = "apm,xgene-device-clock"; #clock-cells = <1>; @@ -533,6 +567,15 @@ interrupts = <0x0 0x4f 0x4>; }; + mmc0: mmc@1c000000 { + compatible = "arasan,sdhci-4.9a"; + reg = <0x0 0x1c000000 0x0 0x100>; + interrupts = <0x0 0x49 0x4>; + dma-coherent; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&sdioclk 0>, <&ahbclk 0>; + }; + phy1: phy@1f21a000 { compatible = "apm,xgene-phy"; reg = <0x0 0x1f21a000 0x0 0x100>; -- 1.8.2.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v7 1/2] arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi 2015-05-13 11:51 ` [PATCH v7 1/2] arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi Suman Tripathi @ 2015-05-18 7:04 ` Suman Tripathi 2015-06-10 18:26 ` Suman Tripathi 0 siblings, 1 reply; 6+ messages in thread From: Suman Tripathi @ 2015-05-18 7:04 UTC (permalink / raw) To: Chris Ball, Anton Vorontsov, Arnd Bergmann, Michal Simek Cc: linux-mmc, linuxppc-dev, devicetree@vger.kernel.org, linux-arm-kernel, Don Dutile, Jon Masters, Mark Langsdorf, patches, Suman Tripathi Hi Arnd, On Wed, May 13, 2015 at 5:21 PM, Suman Tripathi <stripathi@apm.com> wrote: > This patch adds the arasan mmc nodes to reuse the of-arasan > driver for APM X-Gene SoC. > > Signed-off-by: Suman Tripathi <stripathi@apm.com> > --- > --- > arch/arm64/boot/dts/apm/apm-mustang.dts | 4 +++ > arch/arm64/boot/dts/apm/apm-storm.dtsi | 43 +++++++++++++++++++++++++++++++++ > 2 files changed, 47 insertions(+) > > diff --git a/arch/arm64/boot/dts/apm/apm-mustang.dts b/arch/arm64/boot/dts/apm/apm-mustang.dts > index 83578e7..7a3ea72 100644 > --- a/arch/arm64/boot/dts/apm/apm-mustang.dts > +++ b/arch/arm64/boot/dts/apm/apm-mustang.dts > @@ -52,3 +52,7 @@ > &xgenet { > status = "ok"; > }; > + > +&mmc0 { > + status = "ok"; > +}; > diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi > index c8d3e0e..8e03ecd 100644 > --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi > +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi > @@ -145,6 +145,40 @@ > clock-output-names = "socplldiv2"; > }; > > + ahbclk: ahbclk@1f2ac000 { > + compatible = "apm,xgene-device-clock"; > + #clock-cells = <1>; > + clocks = <&socplldiv2 0>; > + reg = <0x0 0x1f2ac000 0x0 0x1000 > + 0x0 0x17000000 0x0 0x2000>; > + reg-names = "csr-reg", "div-reg"; > + csr-offset = <0x0>; > + csr-mask = <0x1>; > + enable-offset = <0x8>; > + enable-mask = <0x1>; > + divider-offset = <0x164>; > + divider-width = <0x5>; > + divider-shift = <0x0>; > + clock-output-names = "ahbclk"; > + }; > + > + sdioclk: sdioclk@1f2ac000 { > + compatible = "apm,xgene-device-clock"; > + #clock-cells = <1>; > + clocks = <&socplldiv2 0>; > + reg = <0x0 0x1f2ac000 0x0 0x1000 > + 0x0 0x17000000 0x0 0x2000>; > + reg-names = "csr-reg", "div-reg"; > + csr-offset = <0x0>; > + csr-mask = <0x2>; > + enable-offset = <0x8>; > + enable-mask = <0x2>; > + divider-offset = <0x178>; > + divider-width = <0x8>; > + divider-shift = <0x0>; > + clock-output-names = "sdioclk"; > + }; > + > qmlclk: qmlclk { > compatible = "apm,xgene-device-clock"; > #clock-cells = <1>; > @@ -533,6 +567,15 @@ > interrupts = <0x0 0x4f 0x4>; > }; > > + mmc0: mmc@1c000000 { > + compatible = "arasan,sdhci-4.9a"; > + reg = <0x0 0x1c000000 0x0 0x100>; > + interrupts = <0x0 0x49 0x4>; > + dma-coherent; > + clock-names = "clk_xin", "clk_ahb"; > + clocks = <&sdioclk 0>, <&ahbclk 0>; > + }; > + > phy1: phy@1f21a000 { > compatible = "apm,xgene-phy"; > reg = <0x0 0x1f21a000 0x0 0x100>; > -- > 1.8.2.1 > Can you review this ? -- Thanks, with regards, Suman Tripathi ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v7 1/2] arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi 2015-05-18 7:04 ` Suman Tripathi @ 2015-06-10 18:26 ` Suman Tripathi 0 siblings, 0 replies; 6+ messages in thread From: Suman Tripathi @ 2015-06-10 18:26 UTC (permalink / raw) To: Chris Ball, Anton Vorontsov, Arnd Bergmann, Michal Simek Cc: linux-mmc, linuxppc-dev, devicetree@vger.kernel.org, linux-arm-kernel, Don Dutile, Jon Masters, Mark Langsdorf, patches, Suman Tripathi Hi Arnd and all On Mon, May 18, 2015 at 12:34 PM, Suman Tripathi <stripathi@apm.com> wrote: > Hi Arnd, > > On Wed, May 13, 2015 at 5:21 PM, Suman Tripathi <stripathi@apm.com> wrote: >> This patch adds the arasan mmc nodes to reuse the of-arasan >> driver for APM X-Gene SoC. >> >> Signed-off-by: Suman Tripathi <stripathi@apm.com> >> --- >> --- >> arch/arm64/boot/dts/apm/apm-mustang.dts | 4 +++ >> arch/arm64/boot/dts/apm/apm-storm.dtsi | 43 +++++++++++++++++++++++++++++++++ >> 2 files changed, 47 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/apm/apm-mustang.dts b/arch/arm64/boot/dts/apm/apm-mustang.dts >> index 83578e7..7a3ea72 100644 >> --- a/arch/arm64/boot/dts/apm/apm-mustang.dts >> +++ b/arch/arm64/boot/dts/apm/apm-mustang.dts >> @@ -52,3 +52,7 @@ >> &xgenet { >> status = "ok"; >> }; >> + >> +&mmc0 { >> + status = "ok"; >> +}; >> diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> index c8d3e0e..8e03ecd 100644 >> --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi >> +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi >> @@ -145,6 +145,40 @@ >> clock-output-names = "socplldiv2"; >> }; >> >> + ahbclk: ahbclk@1f2ac000 { >> + compatible = "apm,xgene-device-clock"; >> + #clock-cells = <1>; >> + clocks = <&socplldiv2 0>; >> + reg = <0x0 0x1f2ac000 0x0 0x1000 >> + 0x0 0x17000000 0x0 0x2000>; >> + reg-names = "csr-reg", "div-reg"; >> + csr-offset = <0x0>; >> + csr-mask = <0x1>; >> + enable-offset = <0x8>; >> + enable-mask = <0x1>; >> + divider-offset = <0x164>; >> + divider-width = <0x5>; >> + divider-shift = <0x0>; >> + clock-output-names = "ahbclk"; >> + }; >> + >> + sdioclk: sdioclk@1f2ac000 { >> + compatible = "apm,xgene-device-clock"; >> + #clock-cells = <1>; >> + clocks = <&socplldiv2 0>; >> + reg = <0x0 0x1f2ac000 0x0 0x1000 >> + 0x0 0x17000000 0x0 0x2000>; >> + reg-names = "csr-reg", "div-reg"; >> + csr-offset = <0x0>; >> + csr-mask = <0x2>; >> + enable-offset = <0x8>; >> + enable-mask = <0x2>; >> + divider-offset = <0x178>; >> + divider-width = <0x8>; >> + divider-shift = <0x0>; >> + clock-output-names = "sdioclk"; >> + }; >> + >> qmlclk: qmlclk { >> compatible = "apm,xgene-device-clock"; >> #clock-cells = <1>; >> @@ -533,6 +567,15 @@ >> interrupts = <0x0 0x4f 0x4>; >> }; >> >> + mmc0: mmc@1c000000 { >> + compatible = "arasan,sdhci-4.9a"; >> + reg = <0x0 0x1c000000 0x0 0x100>; >> + interrupts = <0x0 0x49 0x4>; >> + dma-coherent; >> + clock-names = "clk_xin", "clk_ahb"; >> + clocks = <&sdioclk 0>, <&ahbclk 0>; >> + }; >> + >> phy1: phy@1f21a000 { >> compatible = "apm,xgene-phy"; >> reg = <0x0 0x1f21a000 0x0 0x100>; >> -- >> 1.8.2.1 >> > > Can you review this ? Sorry to bother on this again . Can you review it ? > > > -- > Thanks, > with regards, > Suman Tripathi -- Thanks, with regards, Suman Tripathi ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <1431517912-10322-1-git-send-email-stripathi-qTEPVZfXA3Y@public.gmane.org>]
* [PATCH v7 2/2] mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0. [not found] ` <1431517912-10322-1-git-send-email-stripathi-qTEPVZfXA3Y@public.gmane.org> @ 2015-05-13 11:51 ` Suman Tripathi 2015-05-18 7:06 ` Suman Tripathi 0 siblings, 1 reply; 6+ messages in thread From: Suman Tripathi @ 2015-05-13 11:51 UTC (permalink / raw) To: chris-OsFVWbfNK3isTnJN9+BGXg, anton-9xeibp6oKSgdnm+yROfE0A, arnd-r2nGTMty4D4, michal.simek-gjFFaj9aHVfQT0dZR+AlfA Cc: linux-mmc-u79uwXL29TY76Z2rM5mHXA, linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, ddutile-H+wXaHxf7aLQT0dZR+AlfA, jcm-H+wXaHxf7aLQT0dZR+AlfA, mlangsdo-H+wXaHxf7aLQT0dZR+AlfA, patches-qTEPVZfXA3Y, Suman Tripathi The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk. This patch adds the support to disable SDR104/SDR50/DDR50 based on reading the capability register 0. Signed-off-by: Suman Tripathi <stripathi-qTEPVZfXA3Y@public.gmane.org> --- --- drivers/mmc/host/sdhci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 58c1770..a3d9b8a 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host) } } - if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) + if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V || + !(caps[0] & SDHCI_CAN_VDD_180)) caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50); -- 1.8.2.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v7 2/2] mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0. 2015-05-13 11:51 ` [PATCH v7 2/2] mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0 Suman Tripathi @ 2015-05-18 7:06 ` Suman Tripathi 0 siblings, 0 replies; 6+ messages in thread From: Suman Tripathi @ 2015-05-18 7:06 UTC (permalink / raw) To: Chris Ball, Anton Vorontsov, Arnd Bergmann, Michal Simek Cc: linux-mmc, linuxppc-dev, devicetree@vger.kernel.org, linux-arm-kernel, Don Dutile, Jon Masters, Mark Langsdorf, patches, Suman Tripathi On Wed, May 13, 2015 at 5:21 PM, Suman Tripathi <stripathi@apm.com> wrote: > The sdhci framework disables SDR104/SDR50/DDR50 based on only quirk. > This patch adds the support to disable SDR104/SDR50/DDR50 based on > reading the capability register 0. > > Signed-off-by: Suman Tripathi <stripathi@apm.com> > --- > --- > drivers/mmc/host/sdhci.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index 58c1770..a3d9b8a 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -3118,7 +3118,8 @@ int sdhci_add_host(struct sdhci_host *host) > } > } > > - if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) > + if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V || > + !(caps[0] & SDHCI_CAN_VDD_180)) > caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | > SDHCI_SUPPORT_DDR50); > > -- > 1.8.2.1 > I didn't get any comments on this patch . Can anyone review it (Michal , Ulf , Arnd etc ...)? -- Thanks, with regards, Suman Tripathi ^ permalink raw reply [flat|nested] 6+ messages in thread
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2015-05-13 11:51 [PATCH v7 0/2] Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller Suman Tripathi
2015-05-13 11:51 ` [PATCH v7 1/2] arm64: dts: Add the arasan mmc nodes in apm-storm.dtsi Suman Tripathi
2015-05-18 7:04 ` Suman Tripathi
2015-06-10 18:26 ` Suman Tripathi
[not found] ` <1431517912-10322-1-git-send-email-stripathi-qTEPVZfXA3Y@public.gmane.org>
2015-05-13 11:51 ` [PATCH v7 2/2] mmc: host: sdhci: Add support to disable SDR104/SDR50/DDR50 based on capability register 0 Suman Tripathi
2015-05-18 7:06 ` Suman Tripathi
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