From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Liao Subject: Re: [PATCH 2/5] clk: mediatek: mt8173: Fix enabling of critical clocks Date: Tue, 26 May 2015 16:36:03 +0800 Message-ID: <1432629363.15597.5.camel@mtksdaap41> References: <1432192376-6712-1-git-send-email-jamesjj.liao@mediatek.com> <1432192376-6712-3-git-send-email-jamesjj.liao@mediatek.com> <20150526074608.GE6325@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20150526074608.GE6325-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+glpam-linux-mediatek=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Sascha Hauer Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Mike Turquette , srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Stephen Boyd , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Henry Chen , Ricky Liang , Rob Herring , linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Sascha Hauer , Matthias Brugger , Yingjoe Chen , Eddie Huang , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org On Tue, 2015-05-26 at 09:46 +0200, Sascha Hauer wrote: > > +static struct clk_onecell_data *mt8173_top_clk_data; > > +static struct clk_onecell_data *mt8173_pll_clk_data; > > + > > +static void mtk_clk_enable_critical(void) > > +{ > > + if (!mt8173_top_clk_data || !mt8173_pll_clk_data) > > + return; > > + > > + clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_MEM_SEL]); > > + clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]); > > + clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_CCI400_SEL]); > > + clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_RTC_SEL]); > > Is CLK_TOP_RTC_SEL really a critical clock? CLK_TOP_RTC_SEL is the main 32k clock used by some system hardware such sleep controller on MT8173. This clock should not be turned off even when software/CPU is sleeping. So it's a better way to set CLK_TOP_RTC_SEL as a critical clock (an always on clock). Best regards, James