From mboxrd@z Thu Jan 1 00:00:00 1970 From: Subject: [PATCH v5 3/6] ARM: dts: imx: update snvs to use syscon access register Date: Wed, 27 May 2015 00:25:59 +0800 Message-ID: <1432657562-5592-4-git-send-email-Frank.Li@freescale.com> References: <1432657562-5592-1-git-send-email-Frank.Li@freescale.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1432657562-5592-1-git-send-email-Frank.Li@freescale.com> Sender: linux-input-owner@vger.kernel.org To: lznuaa@gmail.com, shawn.guo@linaro.org, dmitry.torokhov@gmail.com, robh+dt@kernel.org, alexandre.belloni@free-electrons.com Cc: linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org, rtc-linux@googlegroups.com, devicetree@vger.kernel.org, Frank Li List-Id: devicetree@vger.kernel.org From: Frank Li snvs is MFP device. Change dts to use syscon to allocate register resource. snvs power off also switch to common syscon-poweroff Signed-off-by: Frank Li --- arch/arm/boot/dts/imx6qdl.dtsi | 21 +++++++++++---------- arch/arm/boot/dts/imx6sl.dtsi | 21 +++++++++++---------- arch/arm/boot/dts/imx6sx.dtsi | 19 ++++++++++--------- arch/arm/boot/dts/vfxxx.dtsi | 11 +++++------ 4 files changed, 37 insertions(+), 35 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 0482a66..6e53709 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -686,22 +686,23 @@ fsl,anatop = <&anatop>; }; - snvs@020cc000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x020cc000 0x4000>; + snvs: snvs@020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x020cc000 0x4000>; - snvs_rtc: snvs-rtc-lp@34 { + snvs_rtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; + regmap = <&snvs>; + offset = <0x34>; interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, <0 20 IRQ_TYPE_LEVEL_HIGH>; }; - snvs_poweroff: snvs-poweroff@38 { - compatible = "fsl,sec-v4.0-poweroff"; - reg = <0x38 0x4>; + snvs_poweroff: snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <&snvs>; + offset = <0x38>; + mask = <0x60>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index a78e715..320a27f 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -563,22 +563,23 @@ fsl,anatop = <&anatop>; }; - snvs@020cc000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x020cc000 0x4000>; + snvs: snvs@020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x020cc000 0x4000>; - snvs_rtc: snvs-rtc-lp@34 { + snvs_rtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; + regmap = <&snvs>; + offset = <0x34>; interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, <0 20 IRQ_TYPE_LEVEL_HIGH>; }; - snvs_poweroff: snvs-poweroff@38 { - compatible = "fsl,sec-v4.0-poweroff"; - reg = <0x38 0x4>; + snvs_poweroff: snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <&snvs>; + offset = <0x38>; + mask = <0x60>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 708175d..f8f0819 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -662,20 +662,21 @@ }; snvs: snvs@020cc000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x020cc000 0x4000>; + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x020cc000 0x4000>; - snvs_rtc: snvs-rtc-lp@34 { + snvs_rtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; + regmap = <&snvs>; + offset = <0x34>; interrupts = , ; }; - snvs_poweroff: snvs-poweroff@38 { - compatible = "fsl,sec-v4.0-poweroff"; - reg = <0x38 0x4>; + snvs_poweroff: snvs-poweroff { + compatible = "syscon-poweroff"; + regmap = <&snvs>; + offset = <0x38>; + mask = <0x60>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 4aa3351..23b7243 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -404,14 +404,13 @@ }; snvs0: snvs@400a7000 { - compatible = "fsl,sec-v4.0-mon", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x400a7000 0x2000>; + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x400a7000 0x2000>; - snvsrtc: snvs-rtc-lp@34 { + snvsrtc: snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; - reg = <0x34 0x58>; + regmap = <&snvs0>; + offset = <0x34>; interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_SNVS>; clock-names = "snvs-rtc"; -- 1.9.1