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From: Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	maxime.coquelin-qxv4g6HH51o@public.gmane.org,
	patrice.chotard-qxv4g6HH51o@public.gmane.org,
	srinivas.kandagatla-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Cc: peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 0/2]  Add code to release secondary cores from holding pen.
Date: Mon,  8 Jun 2015 17:16:57 +0100	[thread overview]
Message-ID: <1433780219-1245-1-git-send-email-peter.griffin@linaro.org> (raw)

Hi Maxime,

This patchset adds in the necessary code to manage the holding pen for STi
platforms.

Due to all the STi upstream devs using JTAG to boot the STi boards, there
is currently a SMP bug when booting upstream kernels via u-boot where
only the primary core is brought up.

This hasn't been noticed until now because when booting via JTAG the
stlinux_arm_boot script sets the PC of the secondary cores directly.

I can't test this on a STiH418 platform, as I don't have one, but a similar
DT change will be required there as well. I'm not sure if u-boot uses
the same SBC DMEM offset by default or not.

With these patches applied booting via u-boot now works correctly.

[    0.045456] CPU: Testing write buffer coherency: ok
[    0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.045734] Setting up static identity map for 0x40209000 - 0x40209098
[    0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.065081] Brought up 2 CPUs
[    0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
[    0.065092] CPU: All CPU(s) started in SVC mode.

IMHO these should be considered for the next -rc.

regards,

Peter.

Peter Griffin (2):
  ARM: STi: Add code to release secondary cores from holding pen.
  ARM: STi: DT: STiH407: Add cpu-release-addr dt property.

 arch/arm/boot/dts/stih407-family.dtsi |  4 +++
 arch/arm/mach-sti/headsmp.S           |  1 +
 arch/arm/mach-sti/platsmp.c           | 56 +++++++++++++++++++++++++++++++++--
 arch/arm/mach-sti/smp.h               |  2 ++
 4 files changed, 60 insertions(+), 3 deletions(-)

-- 
1.9.1

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             reply	other threads:[~2015-06-08 16:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-08 16:16 Peter Griffin [this message]
     [not found] ` <1433780219-1245-1-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-06-08 16:16   ` [PATCH 1/2] ARM: STi: Add code to release secondary cores from holding pen Peter Griffin
2015-06-09  9:17     ` Maxime Coquelin
2015-06-08 16:16 ` [PATCH 2/2] ARM: STi: DT: STiH407: Add cpu-release-addr dt property Peter Griffin
     [not found]   ` <1433780219-1245-3-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-06-09  9:19     ` Maxime Coquelin
2015-06-09  9:21 ` [PATCH 0/2] Add code to release secondary cores from holding pen Maxime Coquelin

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