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Fri, 22 May 2026 02:09:33 -0700 (PDT) X-Received: by 2002:a17:90b:564f:b0:368:ed92:6f3 with SMTP id 98e67ed59e1d1-36a677ce506mr2573549a91.18.1779440972660; Fri, 22 May 2026 02:09:32 -0700 (PDT) Received: from [10.218.5.114] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36a72188499sm717523a91.4.2026.05.22.02.09.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 22 May 2026 02:09:32 -0700 (PDT) Message-ID: <143e095c-471b-4cd7-9395-1fa06fa50625@oss.qualcomm.com> Date: Fri, 22 May 2026 14:39:01 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] clk: qcom: Add support for Display Clock Controller on Shikra To: Dmitry Baryshkov Cc: Konrad Dybcio , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260513-shikra-dispcc-gpucc-v1-0-5fd673146ab2@oss.qualcomm.com> <20260513-shikra-dispcc-gpucc-v1-3-5fd673146ab2@oss.qualcomm.com> <1cf064d0-14b9-489f-964f-614aeed4fcbd@oss.qualcomm.com> <1c0bb8ff-eaca-4779-9b2f-4d564abd8670@oss.qualcomm.com> Content-Language: en-US From: Imran Shaik In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: Sndv1HOiZIOT6Xg2qF19Mcr3u9FgRzxn X-Authority-Analysis: v=2.4 cv=QblWeMbv c=1 sm=1 tr=0 ts=6a101d4e cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=0XXBx609mjK7aBirURsA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-ORIG-GUID: Sndv1HOiZIOT6Xg2qF19Mcr3u9FgRzxn X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIyMDA5MCBTYWx0ZWRfX7PY3OdipU4qM m+IVw/tlgzCw8N/L2giPVtoml67NfmtBOeWE+w8pikZMQR/e7eR3A7v/cIH/3dXBD1jHlk7eMFz v8p0vu0U00VE526DXdM9Sfcd0WYWtsjVQXgIxMIilUj4E/yn7ejkNr0Txq0+GqKq/94iTNwqA3/ ns0SzFzPKr5c2FN8211fYU3acpT2Wj2WCUak4Fks3wPM2aHN8SAMF9F1p63rkPAUDSkORFqxra0 KGrXsnRkzYZpvLSlypZA1lm/n/zCSwFsi5lrUUpYz8k+f4mLymxGMFmWmQXXwgOxySgMzXtjYFm +Gxv00EJRrHogFba+ZjESZ3fjOY33k/ZusBrmeusjciCdUUxrPN3RanLi/ZHRhRDBOGskoX6Xtn l+KVjxWCKdLKcG3dv9srgEmY2msEmjl1Bb6AKy5Vkeyi0FQLaSvEC47ZDFL/k4UT3vOvuoGpek3 HhL47ijAt5fOC0M0AxQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-22_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605220090 On 20-05-2026 09:59 pm, Dmitry Baryshkov wrote: > On Tue, May 19, 2026 at 09:34:09AM +0530, Imran Shaik wrote: >> >> >> On 13-05-2026 08:38 pm, Dmitry Baryshkov wrote: >>> On Wed, May 13, 2026 at 04:51:03PM +0200, Konrad Dybcio wrote: >>>> On 5/13/26 4:06 PM, Dmitry Baryshkov wrote: >>>>> On Wed, May 13, 2026 at 05:01:16PM +0300, Dmitry Baryshkov wrote: >>>>>> On Wed, May 13, 2026 at 07:10:38PM +0530, Imran Shaik wrote: >>>>>>> Add a driver for the Display clock controller on Qualcomm Shikra SoC. >>>>>>> >>>>>>> Signed-off-by: Imran Shaik >>>>>>> --- >>>>>>> drivers/clk/qcom/Kconfig | 10 + >>>>>>> drivers/clk/qcom/Makefile | 1 + >>>>>>> drivers/clk/qcom/dispcc-shikra.c | 565 +++++++++++++++++++++++++++++++++++++++ >>>>>>> 3 files changed, 576 insertions(+) >>>>>>> >>>>>> >>>>>> Reviewed-by: Dmitry Baryshkov >>>>> >>>>> After comparing the files... >>>>> >>>>> Can we use dispcc-qcm2290.c instead? It uses clock-names instead of >>>>> clock-indices, but I think it should be fine to use clock-names as a >>>>> one-off. >>>> >>>> Or we can convert it to use indices, since those are stable for agatti >>>> too - the names would remain in the binding, just unused by the driver >>> >>> Either is fine for me. >>> >> >> Hi, >> >> In Agatti, apart from the clock-names difference, I see that the AHB/XO >> clocks are not handled as always-on via the probe and instead rely on pm_clk > > There is no pm_clk handling in Agatti driver. > >> style handling, whereas Shikra follows the newer pattern by marking required >> CBCRs as critical during probe. I think that attempting to modify this >> approach into Agatti may introduce unnecessary complexity. > > Well, you can start by explaining what caused the difference and the > result of those differences. > >> >> And the Agatti DISPCC doesn't have the DT_DSI1 bindings exposed, and >> updating this might break the ABI with respect to bindings, and DT. > > You can add Shikra-specific bindings. See how it's handled for other > dispcc drivers. > >> Given these and considering that Agatti is already stable, keeping the >> Shikra as separate GPUCC/DISPCC drivers is better to avoid the risk of >> regressions and complexity. > > I think you've provided arguments for merging two drivers. It would > allow us to modernize Agatti driver and also to make sure that both > platforms use the well-tested code pattern. > Sure Dmitry, but we would like to proceed with Shikra as-is now since it already follows the latest upstream conventions, and will handle Agatti modernization as a follow-up series to align and reuse Shikra drivers. Thanks, Imran