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From: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	gregory.0xf0-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org,
	Florian Fainelli
	<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: [PATCH v2 1/3] Documentation: bindings: brcmstb: Document write-pairing
Date: Tue, 15 Sep 2015 11:14:58 -0700	[thread overview]
Message-ID: <1442340900-15320-2-git-send-email-f.fainelli@gmail.com> (raw)
In-Reply-To: <1442340900-15320-1-git-send-email-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Document the hif-cpubiuctrl node a bit more, and add a documentation
entry for the optional "brcm,write-pairing" property.

Signed-off-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
Changes in v2:

- added a description of what the BIU stands for and what write pairing is
- fixed the compatible string description

 .../devicetree/bindings/arm/bcm/brcm,brcmstb.txt     | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
index 430608ec09f0..8ac28eb4a5a1 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
@@ -20,6 +20,25 @@ system control is required:
     - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon"
     - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
 
+hif-cpubiuctrl node
+-------------------
+SoCs with Broadcom Brahma15 ARM-based CPUs have a specific Bus Interface Unit
+(BIU) block which controls and interfaces the CPU complex to the different
+Memory Controller Ports (MCP), one per memory controller (MEMC). This BIU block
+offers a feature called Write Pairing which consists in collapsing two adjacent
+cache lines into a single (bursted) write transaction towards the memory
+controller (MEMC) to maximize write bandwidth.
+
+Required properties:
+
+    - compatible: must be "brcm,bcm7445-hif-cpubiuctrl", "syscon"
+
+Optional properties:
+
+    - brcm,write-pairing:
+	Boolean property, which when present indicates that the chip
+	supports write-pairing.
+
 example:
     rdb {
         #address-cells = <1>;
@@ -35,6 +54,7 @@ example:
         hif_cpubiuctrl: syscon@3e2400 {
             compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
             reg = <0x3e2400 0x5b4>;
+            brcm,write-pairing;
         };
 
         hif_continuation: syscon@452000 {
-- 
2.1.0

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  parent reply	other threads:[~2015-09-15 18:14 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-15 18:14 [PATCH v2 0/3] ARM: brcmstb: Bus Interface Unit support Florian Fainelli
     [not found] ` <1442340900-15320-1-git-send-email-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-09-15 18:14   ` Florian Fainelli [this message]
     [not found]     ` <1442340900-15320-2-git-send-email-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-09-17  6:09       ` [PATCH v2 1/3] Documentation: bindings: brcmstb: Document write-pairing Gregory Fong
     [not found]         ` <CADtm3G4FNAdLT2CGU++pmMvs2M-bHAQ5GH+GwnLXknT2xTOCLw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-09-17 17:28           ` Florian Fainelli
2015-09-15 18:14   ` [PATCH v2 2/3] soc: brcmstb: Add Bus Interface Unit control setup Florian Fainelli
     [not found]     ` <1442340900-15320-3-git-send-email-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-09-17  6:08       ` Gregory Fong
     [not found]         ` <CADtm3G6SkczVkFK0n=fpMCkocj_ijGWtHkfipTZZfp8deC=6zg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-09-17 17:42           ` Florian Fainelli
     [not found]             ` <55FAFB7A.4010105-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-09-18 13:12               ` Gregory Fong
2015-09-18 19:22       ` Florian Fainelli
2015-09-15 18:15   ` [PATCH v2 3/3] ARM: brcmstb: Setup BIU control registers during boot Florian Fainelli
     [not found]     ` <1442340900-15320-4-git-send-email-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-09-17  6:10       ` Gregory Fong
2015-09-18 19:23       ` Florian Fainelli
  -- strict thread matches above, loose matches on Subject: below --
2015-09-17 13:35 [PATCH v2 1/3] Documentation: bindings: brcmstb: Document write-pairing Rob Herring

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