[PATCH 0/3] Support the timer on RK3368 SoC

[PATCH 0/3] Support the timer on RK3368 SoC

[Caesar Wang]

Timer0~11 count up from zero to a programmed value and
generate an interrupt when the count reaches the programmed value.

TIMER0, TIMER1, TIMER2, Timer3, TIMER4 and TIMER5 are in the CPU
subsystem, using timer ch0 ~ ch5 respectively. The timer clock is 24MHz
OSC.

This series are found on RK3368 SoC, verified on rk3368 evb board.



Caesar Wang (3):
  clocksource: rockchip: Make the driver more readability and compatible
  arm64: Enable the timer on Rockchip architecture
  arm64: dts: rockchip: Add the needed timer for rk3368 SoC

 arch/arm64/Kconfig.platforms             |  1 +
 arch/arm64/boot/dts/rockchip/rk3368.dtsi |  6 ++++++
 drivers/clocksource/rockchip_timer.c     | 29 +++++++++++++++--------------
 3 files changed, 22 insertions(+), 14 deletions(-)

-- 
1.9.1

[PATCH 3/3] arm64: dts: rockchip: Add the needed timer for rk3368 SoC

[Caesar Wang]

There is a need of a broadcast timer in this case to ensure proper
wakeup when the cpus are in sleep mode and a timer expires.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a712bea..99edbaa 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -214,6 +214,12 @@
 			(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
+	timer@ff810000 {
+		compatible = "rockchip,rk3288-timer";
+		reg = <0x0 0xff810000 0x0 0x20>;
+		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	xin24m: oscillator {
 		compatible = "fixed-clock";
 		clock-frequency = <24000000>;
-- 
1.9.1

Re: [PATCH 3/3] arm64: dts: rockchip: Add the needed timer for rk3368 SoC

[Heiko Stübner]

Am Donnerstag, 17. September 2015, 15:51:12 schrieb Caesar Wang:
> There is a need of a broadcast timer in this case to ensure proper
> wakeup when the cpus are in sleep mode and a timer expires.
> 
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---
> 
>  arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a712bea..99edbaa 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -214,6 +214,12 @@
>  			(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
>  	};
> 
> +	timer@ff810000 {
> +		compatible = "rockchip,rk3288-timer";

you probably want a
		compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";

> +		reg = <0x0 0xff810000 0x0 0x20>;
> +		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
>  	xin24m: oscillator {
>  		compatible = "fixed-clock";
>  		clock-frequency = <24000000>;

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Re: [PATCH 3/3] arm64: dts: rockchip: Add the needed timer for rk3368 SoC

[Caesar Wang]

在 2015年09月18日 03:01, Heiko Stübner 写道:
> Am Donnerstag, 17. September 2015, 15:51:12 schrieb Caesar Wang:
>> There is a need of a broadcast timer in this case to ensure proper
>> wakeup when the cpus are in sleep mode and a timer expires.
>>
>> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> ---
>>
>>   arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a712bea..99edbaa 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
>> @@ -214,6 +214,12 @@
>>   			(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
>>   	};
>>
>> +	timer@ff810000 {
>> +		compatible = "rockchip,rk3288-timer";
> you probably want a
> 		compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";

Done.

More consideration for the future.
Although the "rk3288-timer" is working for 3368, agreed to add the 
'rk3368-timer' for the rk3368-spec  timer in the future.

>
>> +		reg = <0x0 0xff810000 0x0 0x20>;
>> +		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
>> +	};
>> +
>>   	xin24m: oscillator {
>>   		compatible = "fixed-clock";
>>   		clock-frequency = <24000000>;
>
>
>
>
> -- 
> Thanks,
> Caesar
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