From mboxrd@z Thu Jan 1 00:00:00 1970 From: Caesar Wang Subject: [PATCH 3/3] arm64: dts: rockchip: Add the needed timer for rk3368 SoC Date: Thu, 17 Sep 2015 15:51:12 +0800 Message-ID: <1442476272-31723-4-git-send-email-wxt@rock-chips.com> References: <1442476272-31723-1-git-send-email-wxt@rock-chips.com> Return-path: In-Reply-To: <1442476272-31723-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org To: Heiko Stuebner , Daniel Lezcano , Catalin Marinas , Will Deacon Cc: Caesar Wang , devicetree@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , linux-rockchip@lists.infradead.org, Rob Herring , Pawel Moll , Mark Rutland , Olof Johansson , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. Signed-off-by: Caesar Wang --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a712bea..99edbaa 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -214,6 +214,12 @@ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; }; + timer@ff810000 { + compatible = "rockchip,rk3288-timer"; + reg = <0x0 0xff810000 0x0 0x20>; + interrupts = ; + }; + xin24m: oscillator { compatible = "fixed-clock"; clock-frequency = <24000000>; -- 1.9.1