From mboxrd@z Thu Jan 1 00:00:00 1970 From: Roger Quadros Subject: [PATCH v3 25/27] ARM: dts: am335x: Provide NAND ready pin Date: Fri, 18 Sep 2015 17:53:47 +0300 Message-ID: <1442588029-13769-26-git-send-email-rogerq@ti.com> References: <1442588029-13769-1-git-send-email-rogerq@ti.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1442588029-13769-1-git-send-email-rogerq@ti.com> Sender: linux-kernel-owner@vger.kernel.org To: tony@atomide.com Cc: dwmw2@infradead.org, computersforpeace@gmail.com, ezequiel@vanguardiasur.com.ar, javier@dowhile0.org, fcooper@ti.com, nsekhar@ti.com, linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros List-Id: devicetree@vger.kernel.org On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 7869 KiB/ to 8875 KiB/s and write speed was unchanged at 5100 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/am335x-chilisom.dtsi | 4 +--- arch/arm/boot/dts/am335x-evm.dts | 4 +--- arch/arm/boot/dts/am335x-igep0033.dtsi | 4 +--- 3 files changed, 3 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/am335x-chilisom.dtsi b/arch/arm/boot/dts/am335x-chilisom.dtsi index e2b5e22..3c71c5d 100644 --- a/arch/arm/boot/dts/am335x-chilisom.dtsi +++ b/arch/arm/boot/dts/am335x-chilisom.dtsi @@ -212,6 +212,7 @@ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ interrupt-parent = <&intc>; interrupts = <100>; + ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <8>; @@ -230,12 +231,9 @@ gpmc,access-ns = <64>; gpmc,rd-cycle-ns = <82>; gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; }; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index bea36e1..c7dfc21 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -523,6 +523,7 @@ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ interrupt-parent = <&intc>; interrupts = <100>; + ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <8>; @@ -541,12 +542,9 @@ gpmc,access-ns = <64>; gpmc,rd-cycle-ns = <82>; gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi index 9252ff1..84d4d50 100644 --- a/arch/arm/boot/dts/am335x-igep0033.dtsi +++ b/arch/arm/boot/dts/am335x-igep0033.dtsi @@ -133,6 +133,7 @@ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ interrupt-parent = <&intc>; interrupts = <100>; + ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ nand-bus-width = <8>; ti,nand-ecc-opt = "bch8"; gpmc,device-width = <1>; @@ -150,12 +151,9 @@ gpmc,access-ns = <64>; gpmc,rd-cycle-ns = <82>; gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; -- 2.1.4