From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joachim Eastwood Subject: [PATCH 09/16] ARM: dts: lpc18xx: add sct pwm node Date: Thu, 1 Oct 2015 22:54:46 +0200 Message-ID: <1443732893-17145-10-git-send-email-manabian@gmail.com> References: <1443732893-17145-1-git-send-email-manabian@gmail.com> Return-path: In-Reply-To: <1443732893-17145-1-git-send-email-manabian-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: Ariel D'Alessandro , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org, Joachim Eastwood List-Id: devicetree@vger.kernel.org From: Ariel D'Alessandro NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State Configurable Timer (SCT) which can be configured as a Pulse Width Modulator. Signed-off-by: Ariel D'Alessandro Signed-off-by: Joachim Eastwood --- arch/arm/boot/dts/lpc18xx.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi index 4ea82536a8a0..19c6f2951129 100644 --- a/arch/arm/boot/dts/lpc18xx.dtsi +++ b/arch/arm/boot/dts/lpc18xx.dtsi @@ -68,6 +68,16 @@ }; soc { + sct_pwm: pwm@40000000 { + compatible = "nxp,lpc1850-sct-pwm"; + reg = <0x40000000 0x1000>; + clocks =<&ccu1 CLK_CPU_SCT>; + clock-names = "pwm"; + resets = <&rgu 37>; + #pwm-cells = <3>; + status = "disabled"; + }; + dmac: dma-controller@40002000 { compatible = "arm,pl080", "arm,primecell"; arm,primecell-periphid = <0x00041080>; -- 1.8.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html