From: Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Vikram Prakash <vikramp-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
Pramod KUMAR <pramodku-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org
Subject: [PATCH 4/6] arm64: dts: Add ARM PMUv3 DT node in NS2 DT
Date: Fri, 2 Oct 2015 23:24:21 +0530 [thread overview]
Message-ID: <1443808463-21120-5-git-send-email-anup.patel@broadcom.com> (raw)
In-Reply-To: <1443808463-21120-1-git-send-email-anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
The NS2 SoC has Cortex-A57 CPUs which support ARM PMUv3 so,
lets enable ARM PMUv3 in NS2 DT.
Signed-off-by: Anup Patel <anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Reviewed-by: Vikram Prakash <vikramp-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Reviewed-by: Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Reviewed-by: Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 5d2ac6b..bc31c0e 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -44,7 +44,7 @@
#address-cells = <2>;
#size-cells = <0>;
- cpu@0 {
+ A57_0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0 0>;
@@ -53,7 +53,7 @@
next-level-cache = <&CLUSTER0_L2>;
};
- cpu@1 {
+ A57_1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0 1>;
@@ -62,7 +62,7 @@
next-level-cache = <&CLUSTER0_L2>;
};
- cpu@2 {
+ A57_2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0 2>;
@@ -71,7 +71,7 @@
next-level-cache = <&CLUSTER0_L2>;
};
- cpu@3 {
+ A57_3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0 3>;
@@ -97,6 +97,18 @@
IRQ_TYPE_EDGE_RISING)>;
};
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&A57_0>,
+ <&A57_1>,
+ <&A57_2>,
+ <&A57_3>;
+ };
+
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2015-10-02 17:54 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 17:54 [PATCH 0/6] arm64: Simple additions to NS2 DT Anup Patel
2015-10-02 17:54 ` [PATCH 1/6] arm64: dts: Add L2-cache DT node for NS2 Anup Patel
2015-10-02 17:54 ` [PATCH 2/6] arm64: dts: Add SMMU " Anup Patel
2015-10-02 17:54 ` [PATCH 3/6] arm64: dts: Add syscon based reboot in DT " Anup Patel
[not found] ` <1443808463-21120-1-git-send-email-anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2015-10-02 17:54 ` Anup Patel [this message]
2015-10-02 17:54 ` [PATCH 5/6] arm64: dts: Add IPROC RNG200 DT node " Anup Patel
2015-10-02 17:54 ` [PATCH 6/6] arm64: dts: Add I2C nodes " Anup Patel
2015-10-23 9:19 ` [PATCH 0/6] arm64: Simple additions to NS2 DT Anup Patel
2015-11-03 8:10 ` Anup Patel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1443808463-21120-5-git-send-email-anup.patel@broadcom.com \
--to=anup.patel-dy08kvg/lbpwk0htik3j/w@public.gmane.org \
--cc=bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org \
--cc=catalin.marinas-5wv7dgnIgG8@public.gmane.org \
--cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
--cc=galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org \
--cc=ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org \
--cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \
--cc=pawel.moll-5wv7dgnIgG8@public.gmane.org \
--cc=pramodku-dY08KVG/lbpWk0Htik3J/w@public.gmane.org \
--cc=rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org \
--cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
--cc=sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org \
--cc=vikramp-dY08KVG/lbpWk0Htik3J/w@public.gmane.org \
--cc=will.deacon-5wv7dgnIgG8@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).