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From: Zhou Wang <wangzhou1@hisilicon.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
	jingoohan1@gmail.com, pratyush.anand@gmail.com,
	Arnd Bergmann <arnd@arndb.de>,
	linux@arm.linux.org.uk, thomas.petazzoni@free-electrons.com,
	gabriele.paoloni@huawei.com, lorenzo.pieralisi@arm.com,
	james.morse@arm.com, Liviu.Dudau@arm.com, jason@lakedaemon.net,
	robh@kernel.org, gabriel.fernandez@linaro.org,
	Minghuan.Lian@freescale.com
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	zhangjukuo@huawei.com, qiuzhenfa@hisilicon.com,
	liudongdong3@huawei.com, qiujiang@huawei.com,
	xuwei5@hisilicon.com, liguozhu@hisilicon.com,
	Zhou Wang <wangzhou1@hisilicon.com>
Subject: [PATCH v11 2/6] ARM/PCI: remove align_resource in pci_sys_data
Date: Fri, 16 Oct 2015 18:23:37 +0800	[thread overview]
Message-ID: <1444991021-109306-3-git-send-email-wangzhou1@hisilicon.com> (raw)
In-Reply-To: <1444991021-109306-1-git-send-email-wangzhou1@hisilicon.com>

From: gabriele paoloni <gabriele.paoloni@huawei.com>

This patch is needed in order to unify the PCIe designware framework for ARM and
ARM64 architectures. In the PCIe designware unification process we are calling
pci_create_root_bus() passing a "sysdata" parameter that is the same for both
ARM and ARM64 and is of type "struct pcie_port*". In the ARM case this will
cause a problem with the function pcibios_align_resource(); in fact this will
cast "dev->sysdata" to "struct pci_sys_data*", whereas designware had passed a
"struct pcie_port*" pointer.

This patch solves the issue by removing "align_resource" from "pci_sys_data"
struct and defining a static global function pointer in "bios32.c"

Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
---
 arch/arm/include/asm/mach/pci.h |  6 ------
 arch/arm/kernel/bios32.c        | 12 ++++++++----
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 8857d28..0070e85 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -52,12 +52,6 @@ struct pci_sys_data {
 	u8		(*swizzle)(struct pci_dev *, u8 *);
 					/* IRQ mapping				*/
 	int		(*map_irq)(const struct pci_dev *, u8, u8);
-					/* Resource alignement requirements	*/
-	resource_size_t (*align_resource)(struct pci_dev *dev,
-					  const struct resource *res,
-					  resource_size_t start,
-					  resource_size_t size,
-					  resource_size_t align);
 	void		*private_data;	/* platform controller private data	*/
 };
 
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 874e182..6551d28 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -17,6 +17,11 @@
 #include <asm/mach/pci.h>
 
 static int debug_pci;
+static resource_size_t (*align_resource)(struct pci_dev *dev,
+		  const struct resource *res,
+		  resource_size_t start,
+		  resource_size_t size,
+		  resource_size_t align) = NULL;
 
 /*
  * We can't use pci_get_device() here since we are
@@ -456,7 +461,7 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
 		sys->busnr   = busnr;
 		sys->swizzle = hw->swizzle;
 		sys->map_irq = hw->map_irq;
-		sys->align_resource = hw->align_resource;
+		align_resource = hw->align_resource;
 		INIT_LIST_HEAD(&sys->resources);
 
 		if (hw->private_data)
@@ -572,7 +577,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 				resource_size_t size, resource_size_t align)
 {
 	struct pci_dev *dev = data;
-	struct pci_sys_data *sys = dev->sysdata;
 	resource_size_t start = res->start;
 
 	if (res->flags & IORESOURCE_IO && start & 0x300)
@@ -580,8 +584,8 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 
 	start = (start + align - 1) & ~(align - 1);
 
-	if (sys->align_resource)
-		return sys->align_resource(dev, res, start, size, align);
+	if (align_resource)
+		return align_resource(dev, res, start, size, align);
 
 	return start;
 }
-- 
1.9.1

  parent reply	other threads:[~2015-10-16 10:23 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-16 10:23 [PATCH v11 0/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
2015-10-16 10:23 ` [PATCH v11 1/6] PCI: designware: move calculation of bus addresses to DRA7xx Zhou Wang
2015-10-21 22:15   ` Bjorn Helgaas
2015-10-22  7:21     ` Gabriele Paoloni
2015-10-22 16:35       ` Bjorn Helgaas
2015-10-22 16:37         ` Gabriele Paoloni
2015-10-26  7:27         ` Zhou Wang
2015-10-16 10:23 ` Zhou Wang [this message]
2015-10-16 10:23 ` [PATCH v11 3/6] PCI: designware: Add ARM64 support Zhou Wang
     [not found]   ` <1444991021-109306-4-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2015-10-22 18:28     ` Bjorn Helgaas
2015-10-26  7:37       ` Zhou Wang
2015-10-16 10:23 ` [PATCH v11 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Zhou Wang
     [not found]   ` <1444991021-109306-5-git-send-email-wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2015-10-22 18:46     ` Bjorn Helgaas
2015-10-26  8:24       ` Zhou Wang
2015-10-16 10:23 ` [PATCH v11 5/6] Documentation: DT: Add HiSilicon PCIe host binding Zhou Wang
2015-10-16 10:23 ` [PATCH v11 6/6] MAINTAINERS: Add pcie-hisi maintainer Zhou Wang

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