From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anup Patel Subject: [PATCH v3 1/2] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident() Date: Fri, 23 Oct 2015 10:46:12 +0530 Message-ID: <1445577373-21252-2-git-send-email-anup.patel@broadcom.com> References: <1445577373-21252-1-git-send-email-anup.patel@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1445577373-21252-1-git-send-email-anup.patel@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org To: David Woodhouse , Brian Norris , Linux MTD Cc: Rob Herring , Pawel Moll , Mark Rutland , Catalin Marinas , Will Deacon , Sudeep Holla , Ian Campbell , Kumar Gala , Ray Jui , Scott Branden , Florian Fainelli , Pramod KUMAR , Vikram Prakash , Sandeep Tripathy , Linux ARM Kernel , Device Tree , Linux Kernel , BCM Kernel Feedback , Anup Patel List-Id: devicetree@vger.kernel.org Just like other NAND controllers, the NAND READID command only works in 8bit mode for all versions of BRCMNAND controller. This patch forces 8bit mode for each NAND CS in brcmnand_init_cs() before doing nand_scan_ident() to ensure that BRCMNAND controller is in 8bit mode when NAND READID command is issued. Signed-off-by: Anup Patel Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- drivers/mtd/nand/brcmnand/brcmnand.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c index 4cba03d..0be8ef9 100644 --- a/drivers/mtd/nand/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/brcmnand/brcmnand.c @@ -1888,6 +1888,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host) struct mtd_info *mtd; struct nand_chip *chip; int ret; + u16 cfg_offs; struct mtd_part_parser_data ppdata = { .of_node = dn }; ret = of_property_read_u32(dn, "reg", &host->cs); @@ -1930,6 +1931,14 @@ static int brcmnand_init_cs(struct brcmnand_host *host) chip->controller = &ctrl->controller; + /* + * The bootloader might have configured 16bit mode but + * NAND READID command only works in 8bit mode. We force + * 8bit mode here to ensure that NAND READID commands works. + */ + cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG); + nand_writereg(ctrl, cfg_offs, nand_readreg(ctrl, cfg_offs) & ~BIT(23)); + if (nand_scan_ident(mtd, 1, NULL)) return -ENXIO; -- 1.9.1