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From: Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	tomcwarren3959-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	jteki-oRp2ZoJdM/RWk0Htik3J/w@public.gmane.org,
	yelin-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH v4] Tegra: DT: add device tree binding doc for QSPI
Date: Mon, 26 Oct 2015 15:22:20 -0700	[thread overview]
Message-ID: <1445898140-3561-1-git-send-email-twarren@nvidia.com> (raw)

This patch adds the device tree binding doc for the Tegra
QSPI controller on Tegra210.

Signed-off-by: Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
Changes in v2:
- based it more on kernel's nvidia,tegra114-spi.txt binding
- changes based on prelim review by swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
Changes in v3:
- renamed to 'nvidia,tegra210-qspi.txt' to match kernel bindings
- more changes based on review from swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
Changes in v4:
- move 'clock' up under 'clock-names' entry

 Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt | 42 ++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt
new file mode 100644
index 0000000..fe1558f
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt
@@ -0,0 +1,42 @@
+NVIDIA Tegra QSPI controller.
+
+Required properties:
+- compatible : for Tegra210, must contain "nvidia,tegra210-qspi".
+- reg: Should contain QSPI registers location and length.
+- interrupts: Should contain QSPI interrupt.
+- clock-names : Must include the following entries:
+  - qspi
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - qspi
+
+Optional properties:
+- dmas : Must contain an entry for each entry in clock-names.
+  See ../dma/dma.txt for details.
+- dma-names : Must include the following entries:
+  - rx
+  - tx
+
+Recommended properties:
+- spi-max-frequency: Definition as per spi-bus.txt
+
+Example:
+
+spi@70410000 {
+	compatible = "nvidia,tegra210-qspi";
+	reg = <0x0 0x70410000 0x0 0x1000>;
+	interrupts = <0 10 0x04>;
+	spi-max-frequency = <24000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clocks = <&tegra_car 211>;
+	clock-names = "qspi";
+	resets = <&tegra_car 211>;
+	reset-names = "qspi";
+	dmas = <&apbdma 16>, <&apbdma 16>;
+	dma-names = "rx", "tx";
+	status = "disabled";
+};
-- 
1.8.2.1.610.g562af5b

             reply	other threads:[~2015-10-26 22:22 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-26 22:22 Tom Warren [this message]
     [not found] ` <1445898140-3561-1-git-send-email-twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2015-10-26 23:02   ` [PATCH v4] Tegra: DT: add device tree binding doc for QSPI Stephen Warren
     [not found]     ` <562EB11D.5040706-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2015-11-09 12:45       ` Thierry Reding
     [not found]         ` <20151109124545.GD23941-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org>
2015-11-09 15:17           ` Stephen Warren
2015-10-26 23:09   ` Rob Herring

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