From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kapil Hali Subject: [PATCH RESEND 2/4] ARM: dts: add SMP support for Broadcom NSP Date: Thu, 5 Nov 2015 00:51:19 -0500 Message-ID: <1446702681-45339-3-git-send-email-kapilh@broadcom.com> References: <1446702681-45339-1-git-send-email-kapilh@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1446702681-45339-1-git-send-email-kapilh@broadcom.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Ray Jui , Scott Branden , Jon Mason , Florian Fainelli Cc: devicetree@vger.kernel.org, Paul Walmsley , Heiko Stuebner , Hauke Mehrtens , Linus Walleij , Lee Jones , Kever Yang , linux-kernel@vger.kernel.org, Chen-Yu Tsai , bcm-kernel-feedback-list@broadcom.com, Gregory Fong , Olof Johansson , Maxime Ripard , Kapil Hali , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Add device tree changes required for providing SMP support for Broadcom Northstar Plus SoC. Signed-off-by: Kapil Hali --- arch/arm/boot/dts/bcm-nsp.dtsi | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 58aca27..d1875d9 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -40,24 +40,33 @@ model = "Broadcom Northstar Plus SoC"; interrupt-parent = <&gic>; + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "brcm,bcm-nsp-smp"; + secondary-boot-reg = <0xffff042c>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x1>; + }; + }; + mpcore { compatible = "simple-bus"; ranges = <0x00000000 0x19020000 0x00003000>; #address-cells = <1>; #size-cells = <1>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x0>; - }; - }; - L2: l2-cache { compatible = "arm,pl310-cache"; reg = <0x2000 0x1000>; -- 2.1.0