[PATCH v3 0/4] crypto: add crypto accelerator support for rk3288

[PATCH v3 0/4] crypto: add crypto accelerator support for rk3288

[Zain Wang]

This commit support three cipher(AES/DES/DES3) and two chainmode(ecb/cbc),
and the more algorithms and new hash drivers will be added later on.

Changed in v3:
- add OF depended in Kconfig
- rename some variate
- add reset property
- remove crypto_p variate

Changed in v2:
- remove some part about hash
- add weak key detection
- changed some variate's type

Changed in v1:
- modify some variate's name
- modify some variate's type
- modify some return value
- remove or modify some print info
- use more dev_xxx in probe
- modify the prio of cipher
- add Kconfig

Zain Wang (4):
  crypto: rockchip/crypto - add DT bindings documentation
  clk: rockchip: set an ID for crypto clk
  Crypto: rockchip/crypto - add crypto driver for rk3288
  ARM: dts: rockchip: Add Crypto node for rk3288

 .../devicetree/bindings/crypto/rockchip-crypto.txt |  29 ++
 arch/arm/boot/dts/rk3288.dtsi                      |  12 +
 drivers/clk/rockchip/clk-rk3288.c                  |   2 +-
 drivers/crypto/Kconfig                             |  11 +
 drivers/crypto/Makefile                            |   1 +
 drivers/crypto/rockchip/Makefile                   |   3 +
 drivers/crypto/rockchip/rk3288_crypto.c            | 392 +++++++++++++++
 drivers/crypto/rockchip/rk3288_crypto.h            | 220 +++++++++
 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 527 +++++++++++++++++++++
 include/dt-bindings/clock/rk3288-cru.h             |   1 +
 10 files changed, 1197 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
 create mode 100644 drivers/crypto/rockchip/Makefile
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c

-- 
1.9.1

[PATCH v3 1/4] crypto: rockchip/crypto - add DT bindings documentation

[Zain Wang]

Add DT bindings documentation for the rk3288 crypto drivers.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
---

Changed in v3:
- add reset property

Changed in v2:
- None

Changed in v1:
- remove the _crypto suffix
- use "rockchip,rk3288-crypto" instead of "rockchip,rk3288"
- remove the description of status


 .../devicetree/bindings/crypto/rockchip-crypto.txt | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt

diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
new file mode 100644
index 0000000..096df34
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
@@ -0,0 +1,29 @@
+Rockchip Electronics And Security Accelerator
+
+Required properties:
+- compatible: Should be "rockchip,rk3288-crypto"
+- reg: Base physical address of the engine and length of memory mapped
+       region
+- interrupts: Interrupt number
+- clocks: Reference to the clocks about crypto
+- clock-names: "aclk" used to clock data
+	       "hclk" used to clock data
+	       "sclk" used to clock crypto accelerator
+	       "apb_pclk" used to clock dma
+- resets: Must contain an entry for each entry in reset-names.
+	  See ../reset/reset.txt for details.
+- reset-names: Must include the name "crypto-rst".
+
+Examples:
+
+	crypto: cypto-controller@ff8a0000 {
+		compatible = "rockchip,rk3288-crypto";
+		reg = <0xff8a0000 0x4000>;
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
+			 <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
+		clock-names = "aclk", "hclk", "sclk", "apb_pclk";
+		resets = <&cru SRST_CRYPTO>;
+		reset-names = "crypto-rst";
+		status = "okay";
+	};
-- 
1.9.1

Re: [PATCH v3 1/4] crypto: rockchip/crypto - add DT bindings documentation

[Rob Herring]

On Wed, Nov 11, 2015 at 02:35:56PM +0800, Zain Wang wrote:
> Add DT bindings documentation for the rk3288 crypto drivers.
> 
> Signed-off-by: Zain Wang <zain.wang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

> ---
> 
> Changed in v3:
> - add reset property
> 
> Changed in v2:
> - None
> 
> Changed in v1:
> - remove the _crypto suffix
> - use "rockchip,rk3288-crypto" instead of "rockchip,rk3288"
> - remove the description of status
> 
> 
>  .../devicetree/bindings/crypto/rockchip-crypto.txt | 29 ++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> 
> diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> new file mode 100644
> index 0000000..096df34
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> @@ -0,0 +1,29 @@
> +Rockchip Electronics And Security Accelerator
> +
> +Required properties:
> +- compatible: Should be "rockchip,rk3288-crypto"
> +- reg: Base physical address of the engine and length of memory mapped
> +       region
> +- interrupts: Interrupt number
> +- clocks: Reference to the clocks about crypto
> +- clock-names: "aclk" used to clock data
> +	       "hclk" used to clock data
> +	       "sclk" used to clock crypto accelerator
> +	       "apb_pclk" used to clock dma
> +- resets: Must contain an entry for each entry in reset-names.
> +	  See ../reset/reset.txt for details.
> +- reset-names: Must include the name "crypto-rst".
> +
> +Examples:
> +
> +	crypto: cypto-controller@ff8a0000 {
> +		compatible = "rockchip,rk3288-crypto";
> +		reg = <0xff8a0000 0x4000>;
> +		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
> +			 <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
> +		clock-names = "aclk", "hclk", "sclk", "apb_pclk";
> +		resets = <&cru SRST_CRYPTO>;
> +		reset-names = "crypto-rst";
> +		status = "okay";
> +	};
> -- 
> 1.9.1
> 
> 
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Re: [PATCH v3 1/4] crypto: rockchip/crypto - add DT bindings documentation

[Zain]

Hi Rob,

On 2015年11月12日 04:24, Rob Herring wrote:
> On Wed, Nov 11, 2015 at 02:35:56PM +0800, Zain Wang wrote:
>> Add DT bindings documentation for the rk3288 crypto drivers.
>>
>> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
> Acked-by: Rob Herring <robh@kernel.org>
Thanks you for responding.

-Zain
>
>> ---
>>
>> Changed in v3:
>> - add reset property
>>
>> Changed in v2:
>> - None
>>
>> Changed in v1:
>> - remove the _crypto suffix
>> - use "rockchip,rk3288-crypto" instead of "rockchip,rk3288"
>> - remove the description of status
>>
>>
>>  .../devicetree/bindings/crypto/rockchip-crypto.txt | 29 ++++++++++++++++++++++
>>  1 file changed, 29 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
>>
>> diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
>> new file mode 100644
>> index 0000000..096df34
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
>> @@ -0,0 +1,29 @@
>> +Rockchip Electronics And Security Accelerator
>> +
>> +Required properties:
>> +- compatible: Should be "rockchip,rk3288-crypto"
>> +- reg: Base physical address of the engine and length of memory mapped
>> +       region
>> +- interrupts: Interrupt number
>> +- clocks: Reference to the clocks about crypto
>> +- clock-names: "aclk" used to clock data
>> +	       "hclk" used to clock data
>> +	       "sclk" used to clock crypto accelerator
>> +	       "apb_pclk" used to clock dma
>> +- resets: Must contain an entry for each entry in reset-names.
>> +	  See ../reset/reset.txt for details.
>> +- reset-names: Must include the name "crypto-rst".
>> +
>> +Examples:
>> +
>> +	crypto: cypto-controller@ff8a0000 {
>> +		compatible = "rockchip,rk3288-crypto";
>> +		reg = <0xff8a0000 0x4000>;
>> +		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
>> +		clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
>> +			 <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
>> +		clock-names = "aclk", "hclk", "sclk", "apb_pclk";
>> +		resets = <&cru SRST_CRYPTO>;
>> +		reset-names = "crypto-rst";
>> +		status = "okay";
>> +	};
>> -- 
>> 1.9.1
>>
>>
>
>

[PATCH v3 2/4] clk: rockchip: set an ID for crypto clk

[Zain Wang]

Set an ID for crypto clk, so that it can be called in other part.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
---

Changed in v3:
- None

Changed in v2: 
- None

Changed in v1:
- define SCLK_CRYPTO in rk3288-cru.h
- use SCLK_CRYPTO instead of SRST_CRYPTO

 drivers/clk/rockchip/clk-rk3288.c      | 2 +-
 include/dt-bindings/clock/rk3288-cru.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 9040878..3fceda1 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -295,7 +295,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
 			RK3288_CLKGATE_CON(0), 4, GFLAGS),
 	GATE(0, "c2c_host", "aclk_cpu_src", 0,
 			RK3288_CLKGATE_CON(13), 8, GFLAGS),
-	COMPOSITE_NOMUX(0, "crypto", "aclk_cpu_pre", 0,
+	COMPOSITE_NOMUX(SCLK_CRYPTO, "crypto", "aclk_cpu_pre", 0,
 			RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
 			RK3288_CLKGATE_CON(5), 4, GFLAGS),
 	GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED,
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index c719aac..30dcd60 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -86,6 +86,7 @@
 #define SCLK_USBPHY480M_SRC	122
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
+#define SCLK_CRYPTO			125
 
 #define SCLK_MAC		151
 #define SCLK_MACREF_OUT		152
-- 
1.9.1

Re: [PATCH v3 2/4] clk: rockchip: set an ID for crypto clk

[Heiko Stuebner]

Am Mittwoch, 11. November 2015, 14:35:57 schrieb Zain Wang:
> Set an ID for crypto clk, so that it can be called in other part.
> 
> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>

this should go in together with patch4, the dts change, so an Ack from the
clock-maintainers would be nice :-)


Heiko

> ---
> 
> Changed in v3:
> - None
> 
> Changed in v2: 
> - None
> 
> Changed in v1:
> - define SCLK_CRYPTO in rk3288-cru.h
> - use SCLK_CRYPTO instead of SRST_CRYPTO
> 
>  drivers/clk/rockchip/clk-rk3288.c      | 2 +-
>  include/dt-bindings/clock/rk3288-cru.h | 1 +
>  2 files changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
> index 9040878..3fceda1 100644
> --- a/drivers/clk/rockchip/clk-rk3288.c
> +++ b/drivers/clk/rockchip/clk-rk3288.c
> @@ -295,7 +295,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
>  			RK3288_CLKGATE_CON(0), 4, GFLAGS),
>  	GATE(0, "c2c_host", "aclk_cpu_src", 0,
>  			RK3288_CLKGATE_CON(13), 8, GFLAGS),
> -	COMPOSITE_NOMUX(0, "crypto", "aclk_cpu_pre", 0,
> +	COMPOSITE_NOMUX(SCLK_CRYPTO, "crypto", "aclk_cpu_pre", 0,
>  			RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
>  			RK3288_CLKGATE_CON(5), 4, GFLAGS),
>  	GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED,
> diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
> index c719aac..30dcd60 100644
> --- a/include/dt-bindings/clock/rk3288-cru.h
> +++ b/include/dt-bindings/clock/rk3288-cru.h
> @@ -86,6 +86,7 @@
>  #define SCLK_USBPHY480M_SRC	122
>  #define SCLK_PVTM_CORE		123
>  #define SCLK_PVTM_GPU		124
> +#define SCLK_CRYPTO			125
>  
>  #define SCLK_MAC		151
>  #define SCLK_MACREF_OUT		152
> 

Re: [PATCH v3 2/4] clk: rockchip: set an ID for crypto clk

[Zain]

On 2015年11月12日 07:57, Heiko Stuebner wrote:
> Am Mittwoch, 11. November 2015, 14:35:57 schrieb Zain Wang:
>> Set an ID for crypto clk, so that it can be called in other part.
>>
>> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
> this should go in together with patch4, the dts change, so an Ack from the
> clock-maintainers would be nice :-)
>
>
> Heiko
Ok! Done!
Thanks.
>
>> ---
>>
>> Changed in v3:
>> - None
>>
>> Changed in v2: 
>> - None
>>
>> Changed in v1:
>> - define SCLK_CRYPTO in rk3288-cru.h
>> - use SCLK_CRYPTO instead of SRST_CRYPTO
>>
>>  drivers/clk/rockchip/clk-rk3288.c      | 2 +-
>>  include/dt-bindings/clock/rk3288-cru.h | 1 +
>>  2 files changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
>> index 9040878..3fceda1 100644
>> --- a/drivers/clk/rockchip/clk-rk3288.c
>> +++ b/drivers/clk/rockchip/clk-rk3288.c
>> @@ -295,7 +295,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
>>  			RK3288_CLKGATE_CON(0), 4, GFLAGS),
>>  	GATE(0, "c2c_host", "aclk_cpu_src", 0,
>>  			RK3288_CLKGATE_CON(13), 8, GFLAGS),
>> -	COMPOSITE_NOMUX(0, "crypto", "aclk_cpu_pre", 0,
>> +	COMPOSITE_NOMUX(SCLK_CRYPTO, "crypto", "aclk_cpu_pre", 0,
>>  			RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
>>  			RK3288_CLKGATE_CON(5), 4, GFLAGS),
>>  	GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED,
>> diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
>> index c719aac..30dcd60 100644
>> --- a/include/dt-bindings/clock/rk3288-cru.h
>> +++ b/include/dt-bindings/clock/rk3288-cru.h
>> @@ -86,6 +86,7 @@
>>  #define SCLK_USBPHY480M_SRC	122
>>  #define SCLK_PVTM_CORE		123
>>  #define SCLK_PVTM_GPU		124
>> +#define SCLK_CRYPTO			125
>>  
>>  #define SCLK_MAC		151
>>  #define SCLK_MACREF_OUT		152
>>
>
>
>

Re: [PATCH v3 2/4] clk: rockchip: set an ID for crypto clk

[Heiko Stuebner]

Am Donnerstag, 12. November 2015, 09:13:20 schrieb Zain:
> 
> On 2015年11月12日 07:57, Heiko Stuebner wrote:
> > Am Mittwoch, 11. November 2015, 14:35:57 schrieb Zain Wang:
> >> Set an ID for crypto clk, so that it can be called in other part.
> >>
> >> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
> > this should go in together with patch4, the dts change, so an Ack from the
> > clock-maintainers would be nice :-)
> >
> >
> > Heiko
> Ok! Done!
> Thanks.

I'm not sure I understand that.

There is nothing to do for you here, I was merely stating the fact that
we will need to get an Acked-by from the clock maintainers, to allow
me to take both this and the devicetree patch :-)


Heiko

> >
> >> ---
> >>
> >> Changed in v3:
> >> - None
> >>
> >> Changed in v2: 
> >> - None
> >>
> >> Changed in v1:
> >> - define SCLK_CRYPTO in rk3288-cru.h
> >> - use SCLK_CRYPTO instead of SRST_CRYPTO
> >>
> >>  drivers/clk/rockchip/clk-rk3288.c      | 2 +-
> >>  include/dt-bindings/clock/rk3288-cru.h | 1 +
> >>  2 files changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
> >> index 9040878..3fceda1 100644
> >> --- a/drivers/clk/rockchip/clk-rk3288.c
> >> +++ b/drivers/clk/rockchip/clk-rk3288.c
> >> @@ -295,7 +295,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
> >>  			RK3288_CLKGATE_CON(0), 4, GFLAGS),
> >>  	GATE(0, "c2c_host", "aclk_cpu_src", 0,
> >>  			RK3288_CLKGATE_CON(13), 8, GFLAGS),
> >> -	COMPOSITE_NOMUX(0, "crypto", "aclk_cpu_pre", 0,
> >> +	COMPOSITE_NOMUX(SCLK_CRYPTO, "crypto", "aclk_cpu_pre", 0,
> >>  			RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
> >>  			RK3288_CLKGATE_CON(5), 4, GFLAGS),
> >>  	GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED,
> >> diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
> >> index c719aac..30dcd60 100644
> >> --- a/include/dt-bindings/clock/rk3288-cru.h
> >> +++ b/include/dt-bindings/clock/rk3288-cru.h
> >> @@ -86,6 +86,7 @@
> >>  #define SCLK_USBPHY480M_SRC	122
> >>  #define SCLK_PVTM_CORE		123
> >>  #define SCLK_PVTM_GPU		124
> >> +#define SCLK_CRYPTO			125
> >>  
> >>  #define SCLK_MAC		151
> >>  #define SCLK_MACREF_OUT		152
> >>
> >
> >
> >
> 
> 
> 

Re: [PATCH v3 2/4] clk: rockchip: set an ID for crypto clk

[Zain]

On 2015年11月12日 16:40, Heiko Stuebner wrote:
> Am Donnerstag, 12. November 2015, 09:13:20 schrieb Zain:
>> On 2015年11月12日 07:57, Heiko Stuebner wrote:
>>> Am Mittwoch, 11. November 2015, 14:35:57 schrieb Zain Wang:
>>>> Set an ID for crypto clk, so that it can be called in other part.
>>>>
>>>> Signed-off-by: Zain Wang <zain.wang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>>> this should go in together with patch4, the dts change, so an Ack from the
>>> clock-maintainers would be nice :-)
>>>
>>>
>>> Heiko
>> Ok! Done!
>> Thanks.
> I'm not sure I understand that.
>
> There is nothing to do for you here, I was merely stating the fact that
> we will need to get an Acked-by from the clock maintainers, to allow
> me to take both this and the devicetree patch :-)
>
>
> Heiko
I am sorry that I think you told me to put the two patches together in
next version at first.
Thanks for your writing back.

Zain
>
>>>> ---
>>>>
>>>> Changed in v3:
>>>> - None
>>>>
>>>> Changed in v2: 
>>>> - None
>>>>
>>>> Changed in v1:
>>>> - define SCLK_CRYPTO in rk3288-cru.h
>>>> - use SCLK_CRYPTO instead of SRST_CRYPTO
>>>>
>>>>  drivers/clk/rockchip/clk-rk3288.c      | 2 +-
>>>>  include/dt-bindings/clock/rk3288-cru.h | 1 +
>>>>  2 files changed, 2 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
>>>> index 9040878..3fceda1 100644
>>>> --- a/drivers/clk/rockchip/clk-rk3288.c
>>>> +++ b/drivers/clk/rockchip/clk-rk3288.c
>>>> @@ -295,7 +295,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
>>>>  			RK3288_CLKGATE_CON(0), 4, GFLAGS),
>>>>  	GATE(0, "c2c_host", "aclk_cpu_src", 0,
>>>>  			RK3288_CLKGATE_CON(13), 8, GFLAGS),
>>>> -	COMPOSITE_NOMUX(0, "crypto", "aclk_cpu_pre", 0,
>>>> +	COMPOSITE_NOMUX(SCLK_CRYPTO, "crypto", "aclk_cpu_pre", 0,
>>>>  			RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
>>>>  			RK3288_CLKGATE_CON(5), 4, GFLAGS),
>>>>  	GATE(0, "aclk_bus_2pmu", "aclk_cpu_pre", CLK_IGNORE_UNUSED,
>>>> diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
>>>> index c719aac..30dcd60 100644
>>>> --- a/include/dt-bindings/clock/rk3288-cru.h
>>>> +++ b/include/dt-bindings/clock/rk3288-cru.h
>>>> @@ -86,6 +86,7 @@
>>>>  #define SCLK_USBPHY480M_SRC	122
>>>>  #define SCLK_PVTM_CORE		123
>>>>  #define SCLK_PVTM_GPU		124
>>>> +#define SCLK_CRYPTO			125
>>>>  
>>>>  #define SCLK_MAC		151
>>>>  #define SCLK_MACREF_OUT		152
>>>>
>>>
>>>
>>
>>
>
>
>


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[PATCH v3 3/4] Crypto: rockchip/crypto - add crypto driver for rk3288

[Zain Wang]

Crypto driver support:
     ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
You can alloc tags above in your case.

And other algorithms and platforms will be added later on.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
---

Changed in v3:
- add OF depended in Kconfig
- remove crypto_p variate
- fix of_device_id
- add reset property

Changed in v2:
- remove some part about hash
- add weak key detection
- changed some variate's type

Changde in v1:
- modify some variate's name
- modify some variate's type
- modify some return value
- remove or modify some print info
- use more dev_xxx in probe
- modify the prio of cipher

 drivers/crypto/Kconfig                             |  11 +
 drivers/crypto/Makefile                            |   1 +
 drivers/crypto/rockchip/Makefile                   |   3 +
 drivers/crypto/rockchip/rk3288_crypto.c            | 392 +++++++++++++++
 drivers/crypto/rockchip/rk3288_crypto.h            | 220 +++++++++
 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 527 +++++++++++++++++++++
 6 files changed, 1154 insertions(+)
 create mode 100644 drivers/crypto/rockchip/Makefile
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 2569e04..e5451b6 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
 	  To compile this driver as a module, choose M here: the module
 	  will be called sun4i-ss.
 
+config CRYPTO_DEV_ROCKCHIP
+	tristate "Rockchip's Cryptographic Engine driver"
+	depends on OF && ARCH_ROCKCHIP
+	select CRYPTO_AES
+	select CRYPTO_DES
+	select CRYPTO_BLKCIPHER
+
+	help
+	  This driver interfaces with the hardware crypto accelerator.
+	  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
+
 endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index c3ced6f..713de9d 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
 obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
 obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
 obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
+obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
new file mode 100644
index 0000000..7051c6c
--- /dev/null
+++ b/drivers/crypto/rockchip/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
+rk_crypto-objs := rk3288_crypto.o \
+		  rk3288_crypto_ablkcipher.o \
diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
new file mode 100644
index 0000000..bb36baa
--- /dev/null
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -0,0 +1,392 @@
+/*
+ *Crypto acceleration support for Rockchip RK3288
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Zain Wang <zain.wang@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
+ */
+
+#include "rk3288_crypto.h"
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/clk.h>
+#include <linux/crypto.h>
+#include <linux/reset.h>
+
+static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
+{
+	int err;
+
+	err = clk_prepare_enable(dev->sclk);
+	if (err) {
+		dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n",
+			__func__, __LINE__);
+		goto err_return;
+	}
+	err = clk_prepare_enable(dev->aclk);
+	if (err) {
+		dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n",
+			__func__, __LINE__);
+		goto err_aclk;
+	}
+	err = clk_prepare_enable(dev->hclk);
+	if (err) {
+		dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n",
+			__func__, __LINE__);
+		goto err_hclk;
+	}
+
+	err = clk_prepare_enable(dev->dmaclk);
+	if (err) {
+		dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n",
+			__func__, __LINE__);
+		goto err_dmaclk;
+	}
+	return err;
+err_dmaclk:
+	clk_disable_unprepare(dev->hclk);
+err_hclk:
+	clk_disable_unprepare(dev->aclk);
+err_aclk:
+	clk_disable_unprepare(dev->sclk);
+err_return:
+	return err;
+}
+
+static void rk_crypto_disable_clk(struct rk_crypto_info *dev)
+{
+	clk_disable_unprepare(dev->dmaclk);
+	clk_disable_unprepare(dev->hclk);
+	clk_disable_unprepare(dev->aclk);
+	clk_disable_unprepare(dev->sclk);
+}
+
+static int check_alignment(struct scatterlist *sg_src,
+			   struct scatterlist *sg_dst,
+			   int align_mask)
+{
+	int in, out, align;
+
+	in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
+	     IS_ALIGNED((uint32_t)sg_src->length, align_mask);
+	if (!sg_dst)
+		return in;
+	out = IS_ALIGNED((uint32_t)sg_dst->offset, 4) &&
+	      IS_ALIGNED((uint32_t)sg_dst->length, align_mask);
+	align = in && out;
+
+	return (align && (sg_src->length == sg_dst->length));
+}
+
+static int rk_load_data(struct rk_crypto_info *dev,
+			struct scatterlist *sg_src,
+			struct scatterlist *sg_dst)
+{
+	unsigned int count;
+
+	dev->aligned = dev->aligned ?
+		check_alignment(sg_src, sg_dst, dev->align_size) :
+		dev->aligned;
+	if (dev->aligned) {
+		count = min(dev->left_bytes, sg_src->length);
+		dev->left_bytes -= count;
+
+		if (!dma_map_sg(dev->dev, sg_src, 1, DMA_TO_DEVICE)) {
+			dev_err(dev->dev, "[%s:%d] dma_map_sg(src)  error\n",
+				__func__, __LINE__);
+			return -EINVAL;
+		}
+		dev->addr_in = sg_dma_address(sg_src);
+
+		if (sg_dst) {
+			if (!dma_map_sg(dev->dev, sg_dst, 1, DMA_FROM_DEVICE)) {
+				dev_err(dev->dev,
+					"[%s:%d] dma_map_sg(dst)  error\n",
+					__func__, __LINE__);
+				dma_unmap_sg(dev->dev, sg_src, 1,
+					     DMA_TO_DEVICE);
+				return -EINVAL;
+			}
+			dev->addr_out = sg_dma_address(sg_dst);
+		}
+	} else {
+		count = (dev->left_bytes > PAGE_SIZE) ?
+			PAGE_SIZE : dev->left_bytes;
+
+		if (!sg_pcopy_to_buffer(dev->first, dev->nents,
+					dev->addr_vir, count,
+					dev->total - dev->left_bytes)) {
+			dev_err(dev->dev, "[%s:%d] pcopy err\n",
+				__func__, __LINE__);
+			return -EINVAL;
+		}
+		dev->left_bytes -= count;
+		sg_init_one(&dev->sg_tmp, dev->addr_vir, count);
+		if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, DMA_TO_DEVICE)) {
+			dev_err(dev->dev, "[%s:%d] dma_map_sg(sg_tmp)  error\n",
+				__func__, __LINE__);
+			return -ENOMEM;
+		}
+		dev->addr_in = sg_dma_address(&dev->sg_tmp);
+
+		if (sg_dst) {
+			if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1,
+					DMA_FROM_DEVICE)) {
+				dev_err(dev->dev,
+					"[%s:%d] dma_map_sg(sg_tmp)  error\n",
+					__func__, __LINE__);
+				dma_unmap_sg(dev->dev, &dev->sg_tmp, 1,
+					     DMA_TO_DEVICE);
+				return -ENOMEM;
+			}
+			dev->addr_out = sg_dma_address(&dev->sg_tmp);
+		}
+	}
+	dev->count = count;
+	return 0;
+}
+
+static void rk_unload_data(struct rk_crypto_info *dev)
+{
+	struct scatterlist *sg_in, *sg_out;
+
+	sg_in = dev->aligned ? dev->sg_src : &dev->sg_tmp;
+	dma_unmap_sg(dev->dev, sg_in, 1, DMA_TO_DEVICE);
+
+	if (dev->sg_dst) {
+		sg_out = dev->aligned ? dev->sg_dst : &dev->sg_tmp;
+		dma_unmap_sg(dev->dev, sg_out, 1, DMA_FROM_DEVICE);
+	}
+}
+
+static irqreturn_t crypto_irq_handle(int irq, void *dev_id)
+{
+	struct rk_crypto_info *dev  = platform_get_drvdata(dev_id);
+	u32 interrupt_status;
+	int err = 0;
+
+	spin_lock(&dev->lock);
+
+	if (irq == dev->irq) {
+		interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
+		CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
+		if (interrupt_status & 0x0a) {
+			dev_warn(dev->dev, "DMA Error\n");
+			err = -EFAULT;
+		} else if (interrupt_status & 0x05) {
+			err = dev->update(dev);
+		}
+
+		if (err)
+			dev->complete(dev, err);
+	}
+	spin_unlock(&dev->lock);
+	return IRQ_HANDLED;
+}
+
+static void rk_crypto_tasklet_cb(unsigned long data)
+{
+	struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
+	struct crypto_async_request *async_req, *backlog;
+	struct rk_cipher_reqctx *ablk_reqctx;
+	int err = 0;
+
+	spin_lock(&dev->lock);
+	backlog   = crypto_get_backlog(&dev->queue);
+	async_req = crypto_dequeue_request(&dev->queue);
+	spin_unlock(&dev->lock);
+	if (!async_req) {
+		dev_err(dev->dev, "async_req is NULL !!\n");
+		return;
+	}
+	if (backlog) {
+		backlog->complete(backlog, -EINPROGRESS);
+		backlog = NULL;
+	}
+
+	if (crypto_tfm_alg_type(async_req->tfm) == CRYPTO_ALG_TYPE_ABLKCIPHER) {
+		dev->ablk_req = ablkcipher_request_cast(async_req);
+		ablk_reqctx   = ablkcipher_request_ctx(dev->ablk_req);
+	}
+	err = dev->start(dev);
+	if (err)
+		dev->complete(dev, err);
+}
+
+static struct rk_crypto_tmp *rk_cipher_algs[] = {
+	&rk_ecb_aes_alg,
+	&rk_cbc_aes_alg,
+	&rk_ecb_des_alg,
+	&rk_cbc_des_alg,
+	&rk_ecb_des3_ede_alg,
+	&rk_cbc_des3_ede_alg,
+};
+
+static int rk_crypto_register(struct rk_crypto_info *crypto_info)
+{
+	unsigned int i, k;
+	int err = 0;
+
+	for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
+		rk_cipher_algs[i]->dev = crypto_info;
+		err = crypto_register_alg(&rk_cipher_algs[i]->alg);
+		if (err)
+			goto err_cipher_algs;
+	}
+	return 0;
+
+err_cipher_algs:
+	for (k = 0; k < i; k++)
+		crypto_unregister_alg(&rk_cipher_algs[k]->alg);
+	return err;
+}
+
+static void rk_crypto_unregister(void)
+{
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++)
+		crypto_unregister_alg(&rk_cipher_algs[i]->alg);
+}
+
+static const struct of_device_id crypto_of_id_table[] = {
+	{ .compatible = "rockchip,rk3288-crypto" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, crypto_of_id_table);
+
+static int rk_crypto_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	struct device *dev = &pdev->dev;
+	struct rk_crypto_info *crypto_info;
+	int err = 0;
+
+	crypto_info = devm_kzalloc(&pdev->dev,
+				   sizeof(*crypto_info), GFP_KERNEL);
+	if (!crypto_info) {
+		err = -ENOMEM;
+		goto err_crypto;
+	}
+
+	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
+	if (IS_ERR(crypto_info->rst)) {
+		err = PTR_ERR(crypto_info->rst);
+		goto err_crypto;
+	}
+
+	reset_control_assert(crypto_info->rst);
+	usleep_range(10, 20);
+	reset_control_deassert(crypto_info->rst);
+
+	spin_lock_init(&crypto_info->lock);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(crypto_info->reg)) {
+		err = PTR_ERR(crypto_info->reg);
+		goto err_ioremap;
+	}
+
+	crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
+	if (IS_ERR(crypto_info->aclk)) {
+		err = PTR_ERR(crypto_info->aclk);
+		goto err_ioremap;
+	}
+
+	crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
+	if (IS_ERR(crypto_info->hclk)) {
+		err = PTR_ERR(crypto_info->hclk);
+		goto err_ioremap;
+	}
+
+	crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
+	if (IS_ERR(crypto_info->sclk)) {
+		err = PTR_ERR(crypto_info->sclk);
+		goto err_ioremap;
+	}
+
+	crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
+	if (IS_ERR(crypto_info->dmaclk)) {
+		err = PTR_ERR(crypto_info->dmaclk);
+		goto err_ioremap;
+	}
+
+	crypto_info->irq = platform_get_irq(pdev, 0);
+	if (crypto_info->irq < 0) {
+		dev_warn(crypto_info->dev,
+			 "control Interrupt is not available.\n");
+		err = crypto_info->irq;
+		goto err_ioremap;
+	}
+
+	err = devm_request_irq(&pdev->dev, crypto_info->irq, crypto_irq_handle,
+			       IRQF_SHARED, "rk-crypto", pdev);
+
+	if (err) {
+		dev_err(crypto_info->dev, "irq request failed.\n");
+		goto err_ioremap;
+	}
+
+	crypto_info->dev = &pdev->dev;
+	platform_set_drvdata(pdev, crypto_info);
+
+	tasklet_init(&crypto_info->crypto_tasklet,
+		     rk_crypto_tasklet_cb, (unsigned long)crypto_info);
+	crypto_init_queue(&crypto_info->queue, 50);
+
+	crypto_info->enable_clk = rk_crypto_enable_clk;
+	crypto_info->disable_clk = rk_crypto_disable_clk;
+	crypto_info->load_data = rk_load_data;
+	crypto_info->unload_data = rk_unload_data;
+
+	err = rk_crypto_register(crypto_info);
+	if (err) {
+		dev_err(dev, "err in register alg");
+		goto err_reg_alg;
+	}
+
+	dev_info(dev, "Crypto Accelerator successfully registered\n");
+	return 0;
+
+err_reg_alg:
+	free_irq(crypto_info->irq, crypto_info);
+err_ioremap:
+	reset_control_assert(crypto_info->rst);
+err_crypto:
+	return err;
+}
+
+static int rk_crypto_remove(struct platform_device *pdev)
+{
+	struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
+
+	rk_crypto_unregister();
+	reset_control_assert(crypto_tmp->rst);
+	tasklet_kill(&crypto_tmp->crypto_tasklet);
+	free_irq(crypto_tmp->irq, crypto_tmp);
+
+	return 0;
+}
+
+static struct platform_driver crypto_driver = {
+	.probe		= rk_crypto_probe,
+	.remove		= rk_crypto_remove,
+	.driver		= {
+		.name	= "rk3288-crypto",
+		.of_match_table	= crypto_of_id_table,
+	},
+};
+
+module_platform_driver(crypto_driver);
+
+MODULE_AUTHOR("Zain Wang <zain.wang@rock-chips.com>");
+MODULE_DESCRIPTION("Support for Rockchip's cryptographic engine");
+MODULE_LICENSE("GPL");
diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
new file mode 100644
index 0000000..b5b949a
--- /dev/null
+++ b/drivers/crypto/rockchip/rk3288_crypto.h
@@ -0,0 +1,220 @@
+#ifndef __RK3288_CRYPTO_H__
+#define __RK3288_CRYPTO_H__
+
+#include <crypto/sha.h>
+#include <crypto/aes.h>
+#include <crypto/des.h>
+#include <crypto/ctr.h>
+#include <crypto/algapi.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+
+#define _SBF(v, f)			((v) << (f))
+
+/* Crypto control registers*/
+#define RK_CRYPTO_INTSTS		0x0000
+#define RK_CRYPTO_PKA_DONE_INT		BIT(5)
+#define RK_CRYPTO_HASH_DONE_INT		BIT(4)
+#define RK_CRYPTO_HRDMA_ERR_INT		BIT(3)
+#define RK_CRYPTO_HRDMA_DONE_INT	BIT(2)
+#define RK_CRYPTO_BCDMA_ERR_INT		BIT(1)
+#define RK_CRYPTO_BCDMA_DONE_INT	BIT(0)
+
+#define RK_CRYPTO_INTENA		0x0004
+#define RK_CRYPTO_PKA_DONE_ENA		BIT(5)
+#define RK_CRYPTO_HASH_DONE_ENA		BIT(4)
+#define RK_CRYPTO_HRDMA_ERR_ENA		BIT(3)
+#define RK_CRYPTO_HRDMA_DONE_ENA	BIT(2)
+#define RK_CRYPTO_BCDMA_ERR_ENA		BIT(1)
+#define RK_CRYPTO_BCDMA_DONE_ENA	BIT(0)
+
+#define RK_CRYPTO_CTRL			0x0008
+#define RK_CRYPTO_WRITE_MASK		(0xFFFF << 16)
+#define RK_CRYPTO_TRNG_FLUSH		BIT(9)
+#define RK_CRYPTO_TRNG_START		BIT(8)
+#define RK_CRYPTO_PKA_FLUSH		BIT(7)
+#define RK_CRYPTO_HASH_FLUSH		BIT(6)
+#define RK_CRYPTO_BLOCK_FLUSH		BIT(5)
+#define RK_CRYPTO_PKA_START		BIT(4)
+#define RK_CRYPTO_HASH_START		BIT(3)
+#define RK_CRYPTO_BLOCK_START		BIT(2)
+#define RK_CRYPTO_TDES_START		BIT(1)
+#define RK_CRYPTO_AES_START		BIT(0)
+
+#define RK_CRYPTO_CONF			0x000c
+/* HASH Receive DMA Address Mode:   fix | increment */
+#define RK_CRYPTO_HR_ADDR_MODE		BIT(8)
+/* Block Transmit DMA Address Mode: fix | increment */
+#define RK_CRYPTO_BT_ADDR_MODE		BIT(7)
+/* Block Receive DMA Address Mode:  fix | increment */
+#define RK_CRYPTO_BR_ADDR_MODE		BIT(6)
+#define RK_CRYPTO_BYTESWAP_HRFIFO	BIT(5)
+#define RK_CRYPTO_BYTESWAP_BTFIFO	BIT(4)
+#define RK_CRYPTO_BYTESWAP_BRFIFO	BIT(3)
+/* AES = 0 OR DES = 1 */
+#define RK_CRYPTO_DESSEL				BIT(2)
+#define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE		_SBF(0x00, 0)
+#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		_SBF(0x01, 0)
+#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT		_SBF(0x02, 0)
+
+/* Block Receiving DMA Start Address Register */
+#define RK_CRYPTO_BRDMAS		0x0010
+/* Block Transmitting DMA Start Address Register */
+#define RK_CRYPTO_BTDMAS		0x0014
+/* Block Receiving DMA Length Register */
+#define RK_CRYPTO_BRDMAL		0x0018
+/* Hash Receiving DMA Start Address Register */
+#define RK_CRYPTO_HRDMAS		0x001c
+/* Hash Receiving DMA Length Register */
+#define RK_CRYPTO_HRDMAL		0x0020
+
+/* AES registers */
+#define RK_CRYPTO_AES_CTRL			  0x0080
+#define RK_CRYPTO_AES_BYTESWAP_CNT	BIT(11)
+#define RK_CRYPTO_AES_BYTESWAP_KEY	BIT(10)
+#define RK_CRYPTO_AES_BYTESWAP_IV	BIT(9)
+#define RK_CRYPTO_AES_BYTESWAP_DO	BIT(8)
+#define RK_CRYPTO_AES_BYTESWAP_DI	BIT(7)
+#define RK_CRYPTO_AES_KEY_CHANGE	BIT(6)
+#define RK_CRYPTO_AES_ECB_MODE		_SBF(0x00, 4)
+#define RK_CRYPTO_AES_CBC_MODE		_SBF(0x01, 4)
+#define RK_CRYPTO_AES_CTR_MODE		_SBF(0x02, 4)
+#define RK_CRYPTO_AES_128BIT_key	_SBF(0x00, 2)
+#define RK_CRYPTO_AES_192BIT_key	_SBF(0x01, 2)
+#define RK_CRYPTO_AES_256BIT_key	_SBF(0x02, 2)
+/* Slave = 0 / fifo = 1 */
+#define RK_CRYPTO_AES_FIFO_MODE		BIT(1)
+/* Encryption = 0 , Decryption = 1 */
+#define RK_CRYPTO_AES_DEC		BIT(0)
+
+#define RK_CRYPTO_AES_STS		0x0084
+#define RK_CRYPTO_AES_DONE		BIT(0)
+
+/* AES Input Data 0-3 Register */
+#define RK_CRYPTO_AES_DIN_0		0x0088
+#define RK_CRYPTO_AES_DIN_1		0x008c
+#define RK_CRYPTO_AES_DIN_2		0x0090
+#define RK_CRYPTO_AES_DIN_3		0x0094
+
+/* AES output Data 0-3 Register */
+#define RK_CRYPTO_AES_DOUT_0		0x0098
+#define RK_CRYPTO_AES_DOUT_1		0x009c
+#define RK_CRYPTO_AES_DOUT_2		0x00a0
+#define RK_CRYPTO_AES_DOUT_3		0x00a4
+
+/* AES IV Data 0-3 Register */
+#define RK_CRYPTO_AES_IV_0		0x00a8
+#define RK_CRYPTO_AES_IV_1		0x00ac
+#define RK_CRYPTO_AES_IV_2		0x00b0
+#define RK_CRYPTO_AES_IV_3		0x00b4
+
+/* AES Key Data 0-3 Register */
+#define RK_CRYPTO_AES_KEY_0		0x00b8
+#define RK_CRYPTO_AES_KEY_1		0x00bc
+#define RK_CRYPTO_AES_KEY_2		0x00c0
+#define RK_CRYPTO_AES_KEY_3		0x00c4
+#define RK_CRYPTO_AES_KEY_4		0x00c8
+#define RK_CRYPTO_AES_KEY_5		0x00cc
+#define RK_CRYPTO_AES_KEY_6		0x00d0
+#define RK_CRYPTO_AES_KEY_7		0x00d4
+
+/* des/tdes */
+#define RK_CRYPTO_TDES_CTRL		0x0100
+#define RK_CRYPTO_TDES_BYTESWAP_KEY	BIT(8)
+#define RK_CRYPTO_TDES_BYTESWAP_IV	BIT(7)
+#define RK_CRYPTO_TDES_BYTESWAP_DO	BIT(6)
+#define RK_CRYPTO_TDES_BYTESWAP_DI	BIT(5)
+/* 0: ECB, 1: CBC */
+#define RK_CRYPTO_TDES_CHAINMODE	BIT(4)
+/* TDES Key Mode, 0 : EDE, 1 : EEE */
+#define RK_CRYPTO_TDES_EEE		BIT(3)
+/* 0: DES, 1:TDES */
+#define RK_CRYPTO_TDES_SELECT		BIT(2)
+/* 0: Slave, 1:Fifo */
+#define RK_CRYPTO_TDES_FIFO_MODE	BIT(1)
+/* Encryption = 0 , Decryption = 1 */
+#define RK_CRYPTO_TDES_DEC		BIT(0)
+
+#define RK_CRYPTO_TDES_STS		0x0104
+#define RK_CRYPTO_TDES_DONE		BIT(0)
+
+#define RK_CRYPTO_TDES_DIN_0		0x0108
+#define RK_CRYPTO_TDES_DIN_1		0x010c
+#define RK_CRYPTO_TDES_DOUT_0		0x0110
+#define RK_CRYPTO_TDES_DOUT_1		0x0114
+#define RK_CRYPTO_TDES_IV_0		0x0118
+#define RK_CRYPTO_TDES_IV_1		0x011c
+#define RK_CRYPTO_TDES_KEY1_0		0x0120
+#define RK_CRYPTO_TDES_KEY1_1		0x0124
+#define RK_CRYPTO_TDES_KEY2_0		0x0128
+#define RK_CRYPTO_TDES_KEY2_1		0x012c
+#define RK_CRYPTO_TDES_KEY3_0		0x0130
+#define RK_CRYPTO_TDES_KEY3_1		0x0134
+
+#define CRYPTO_READ(dev, offset)		  \
+		readl_relaxed(((dev)->reg + (offset)))
+#define CRYPTO_WRITE(dev, offset, val)	  \
+		writel_relaxed((val), ((dev)->reg + (offset)))
+/* get register virt address */
+#define CRYPTO_GET_REG_VIRT(dev, offset)   ((dev)->reg + (offset))
+
+struct rk_crypto_info {
+	struct device			*dev;
+	struct clk			*aclk;
+	struct clk			*hclk;
+	struct clk			*sclk;
+	struct clk			*dmaclk;
+	struct reset_control		*rst;
+	void __iomem			*reg;
+	int				irq;
+	struct crypto_queue		queue;
+	struct tasklet_struct		crypto_tasklet;
+	struct ablkcipher_request	*ablk_req;
+	/* device lock */
+	spinlock_t			lock;
+
+	/* the public variable */
+	struct scatterlist		*sg_src;
+	struct scatterlist		*sg_dst;
+	struct scatterlist		sg_tmp;
+	struct scatterlist		*first;
+	unsigned int			left_bytes;
+	void				*addr_vir;
+	int				aligned;
+	int				align_size;
+	size_t				nents;
+	unsigned int			total;
+	unsigned int			count;
+	u32				mode;
+	dma_addr_t			addr_in;
+	dma_addr_t			addr_out;
+	int (*start)(struct rk_crypto_info *dev);
+	int (*update)(struct rk_crypto_info *dev);
+	void (*complete)(struct rk_crypto_info *dev, int err);
+	int (*enable_clk)(struct rk_crypto_info *dev);
+	void (*disable_clk)(struct rk_crypto_info *dev);
+	int (*load_data)(struct rk_crypto_info *dev,
+			 struct scatterlist *sg_src,
+			 struct scatterlist *sg_dst);
+	void (*unload_data)(struct rk_crypto_info *dev);
+};
+
+/* the private variable of cipher */
+struct rk_cipher_ctx {
+	struct rk_crypto_info		*dev;
+	unsigned int			keylen;
+};
+
+struct rk_crypto_tmp {
+	struct rk_crypto_info *dev;
+	struct crypto_alg alg;
+};
+
+extern struct rk_crypto_tmp rk_ecb_aes_alg;
+extern struct rk_crypto_tmp rk_cbc_aes_alg;
+extern struct rk_crypto_tmp rk_ecb_des_alg;
+extern struct rk_crypto_tmp rk_cbc_des_alg;
+extern struct rk_crypto_tmp rk_ecb_des3_ede_alg;
+extern struct rk_crypto_tmp rk_cbc_des3_ede_alg;
+
+#endif
diff --git a/drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c b/drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
new file mode 100644
index 0000000..95a0bc3
--- /dev/null
+++ b/drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
@@ -0,0 +1,527 @@
+/*
+ *Crypto acceleration support for Rockchip RK3288
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Zain Wang <zain.wang@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
+ */
+#include "rk3288_crypto.h"
+
+#define RK_CRYPTO_DEC			BIT(0)
+#define AES	0
+#define TDES	BIT(16)
+
+static void rk_crypto_complete(struct rk_crypto_info *dev, int err)
+{
+	if (dev->ablk_req->base.complete) {
+		if (err)
+			dev_warn(dev->dev, "[%s:%d] err = %d\n",
+				 __func__, __LINE__, err);
+		dev->ablk_req->base.complete(&dev->ablk_req->base, err);
+	}
+}
+
+static int rk_handle_req(struct ablkcipher_request *req, int alig_bytes)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+	int err;
+
+	if (!IS_ALIGNED(req->nbytes, alig_bytes))
+		return -EINVAL;
+
+	spin_lock(&dev->lock);
+	err = ablkcipher_enqueue_request(&dev->queue, req);
+	spin_unlock(&dev->lock);
+	tasklet_schedule(&dev->crypto_tasklet);
+	return err;
+}
+
+static void rk_ablk_init(struct rk_crypto_info *dev,
+			 struct ablkcipher_request *req)
+{
+	dev->left_bytes = req->nbytes;
+	dev->total = req->nbytes;
+	dev->sg_src = req->src;
+	dev->first = req->src;
+	dev->nents = sg_nents(req->src);
+	dev->sg_dst = req->dst;
+	dev->aligned = 1;
+	dev->ablk_req = req;
+}
+
+static int rk_aes_setkey(struct crypto_ablkcipher *cipher,
+			 const u8 *key, unsigned int keylen)
+{
+	struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
+	struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
+
+	if (!key) {
+		dev_err(ctx->dev->dev, "[%s:%d] no key error\n",
+			__func__, __LINE__);
+		return -EINVAL;
+	}
+
+	if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
+	    keylen != AES_KEYSIZE_256) {
+		crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
+		dev_err(ctx->dev->dev, "[%s:%d] expect key len = %d\n",
+			__func__, __LINE__, keylen);
+		return -EINVAL;
+	}
+	ctx->keylen = keylen;
+	memcpy(ctx->dev->reg + RK_CRYPTO_AES_KEY_0, key, keylen);
+	return 0;
+}
+
+static int rk_tdes_setkey(struct crypto_ablkcipher *cipher,
+			  const u8 *key, unsigned int keylen)
+{
+	struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
+	struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
+	u32 tmp[DES_EXPKEY_WORDS];
+
+	if (!key) {
+		dev_err(ctx->dev->dev, "[%s:%d] no key error\n",
+			__func__, __LINE__);
+		return -EINVAL;
+	}
+
+	if (keylen != DES_KEY_SIZE && keylen != DES3_EDE_KEY_SIZE) {
+		crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
+		dev_err(ctx->dev->dev, "[%s:%d] expect key len = %d\n",
+			__func__, __LINE__, keylen);
+		return -EINVAL;
+	}
+
+	if (keylen == DES_KEY_SIZE) {
+		if (!des_ekey(tmp, key) &&
+		    (tfm->crt_flags & CRYPTO_TFM_REQ_WEAK_KEY)) {
+			tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
+			return -EINVAL;
+		}
+	}
+
+	ctx->keylen = keylen;
+	memcpy(ctx->dev->reg + RK_CRYPTO_TDES_KEY1_0, key, keylen);
+	return 0;
+}
+
+static int rk_aes_ecb_encrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_AES_ECB_MODE | AES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_aes_ecb_decrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_AES_ECB_MODE | RK_CRYPTO_DEC | AES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_aes_cbc_encrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_AES_CBC_MODE | AES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_aes_cbc_decrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_AES_CBC_MODE | RK_CRYPTO_DEC | AES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des_ecb_encrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des_ecb_decrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_DEC | TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des_cbc_encrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_TDES_CHAINMODE | TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des_cbc_decrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_TDES_CHAINMODE | RK_CRYPTO_DEC | TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des3_ede_ecb_encrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_TDES_SELECT | TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des3_ede_ecb_decrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_DEC | TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des3_ede_cbc_encrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE | TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static int rk_des3_ede_cbc_decrypt(struct ablkcipher_request *req)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	struct rk_crypto_info *dev = ctx->dev;
+
+	dev->mode = RK_CRYPTO_TDES_SELECT | RK_CRYPTO_TDES_CHAINMODE |
+		    RK_CRYPTO_DEC | TDES;
+	rk_ablk_init(dev, req);
+	return rk_handle_req(req, dev->align_size);
+}
+
+static void rk_ablk_hw_init(struct rk_crypto_info *dev)
+{
+	struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(dev->ablk_req);
+	struct rk_cipher_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+	u32 conf_reg = 0;
+
+	if (dev->mode & TDES) {
+		dev->mode &= ~TDES;
+		dev->mode |= RK_CRYPTO_TDES_FIFO_MODE |
+			     RK_CRYPTO_TDES_BYTESWAP_KEY |
+			     RK_CRYPTO_TDES_BYTESWAP_IV;
+		CRYPTO_WRITE(dev, RK_CRYPTO_TDES_CTRL, dev->mode);
+
+		memcpy(dev->reg + RK_CRYPTO_TDES_IV_0, dev->ablk_req->info, 8);
+		conf_reg = RK_CRYPTO_DESSEL;
+	} else {
+		dev->mode |= RK_CRYPTO_AES_FIFO_MODE |
+			     RK_CRYPTO_AES_KEY_CHANGE |
+			     RK_CRYPTO_AES_BYTESWAP_KEY |
+			     RK_CRYPTO_AES_BYTESWAP_IV;
+
+		if (ctx->keylen == AES_KEYSIZE_192)
+			dev->mode |= RK_CRYPTO_AES_192BIT_key;
+		else if (ctx->keylen == AES_KEYSIZE_256)
+			dev->mode |= RK_CRYPTO_AES_256BIT_key;
+
+		CRYPTO_WRITE(dev, RK_CRYPTO_AES_CTRL, dev->mode);
+
+		memcpy(dev->reg + RK_CRYPTO_AES_IV_0, dev->ablk_req->info, 16);
+	}
+	conf_reg |= RK_CRYPTO_BYTESWAP_BTFIFO |
+		    RK_CRYPTO_BYTESWAP_BRFIFO;
+	CRYPTO_WRITE(dev, RK_CRYPTO_CONF, conf_reg);
+	CRYPTO_WRITE(dev, RK_CRYPTO_INTENA,
+		     RK_CRYPTO_BCDMA_ERR_ENA | RK_CRYPTO_BCDMA_DONE_ENA);
+}
+
+static void crypto_dma_start(struct rk_crypto_info *dev)
+{
+	CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAS, dev->addr_in);
+	CRYPTO_WRITE(dev, RK_CRYPTO_BRDMAL, dev->count / 4);
+	CRYPTO_WRITE(dev, RK_CRYPTO_BTDMAS, dev->addr_out);
+	CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_BLOCK_START |
+			(RK_CRYPTO_BLOCK_START << 16));
+}
+
+static int rk_set_data_start(struct rk_crypto_info *dev)
+{
+	int err;
+
+	err = dev->load_data(dev, dev->sg_src, dev->sg_dst);
+	if (!err)
+		crypto_dma_start(dev);
+	return err;
+}
+
+static int rk_ablk_start(struct rk_crypto_info *dev)
+{
+	int err;
+
+	spin_lock(&dev->lock);
+	rk_ablk_hw_init(dev);
+	err = rk_set_data_start(dev);
+	spin_unlock(&dev->lock);
+	return err;
+}
+
+/* return:
+ *	true	some err was occurred
+ *	fault	no err, continue
+ */
+static int rk_ablk_rx(struct rk_crypto_info *dev)
+{
+	int err = 0;
+
+	dev->unload_data(dev);
+	if (!dev->aligned) {
+		if (!sg_pcopy_from_buffer(dev->ablk_req->dst, dev->nents,
+					  dev->addr_vir, dev->count,
+					  dev->total - dev->left_bytes -
+					  dev->count)) {
+			err = -EINVAL;
+			goto out_rx;
+		}
+	}
+	if (dev->left_bytes) {
+		if (dev->aligned) {
+			if (sg_is_last(dev->sg_src)) {
+				dev_err(dev->dev, "[%s:%d], lack of data\n",
+					__func__, __LINE__);
+				err = -ENOMEM;
+				goto out_rx;
+			}
+			dev->sg_src = sg_next(dev->sg_src);
+			dev->sg_dst = sg_next(dev->sg_dst);
+		}
+		err = rk_set_data_start(dev);
+	} else {
+		/* here show the calculation is over without any err */
+		dev->complete(dev, 0);
+	}
+out_rx:
+	return err;
+}
+
+static int rk_ablk_cra_init(struct crypto_tfm *tfm)
+{
+	struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
+	struct crypto_alg *alg = tfm->__crt_alg;
+	struct rk_crypto_tmp *algt;
+
+	algt = container_of(alg, struct rk_crypto_tmp, alg);
+
+	ctx->dev = algt->dev;
+	ctx->dev->align_size = crypto_tfm_alg_alignmask(tfm) + 1;
+	ctx->dev->start = rk_ablk_start;
+	ctx->dev->update = rk_ablk_rx;
+	ctx->dev->complete = rk_crypto_complete;
+	ctx->dev->addr_vir = (char *)__get_free_page(GFP_KERNEL);
+
+	return ctx->dev->addr_vir ? ctx->dev->enable_clk(ctx->dev) : -ENOMEM;
+}
+
+static void rk_ablk_cra_exit(struct crypto_tfm *tfm)
+{
+	struct rk_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
+
+	free_page((unsigned long)ctx->dev->addr_vir);
+	ctx->dev->disable_clk(ctx->dev);
+}
+
+struct rk_crypto_tmp rk_ecb_aes_alg = {
+	.alg = {
+		.cra_name		= "ecb(aes)",
+		.cra_driver_name	= "ecb-aes-rk",
+		.cra_priority		= 300,
+		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
+					  CRYPTO_ALG_ASYNC,
+		.cra_blocksize		= AES_BLOCK_SIZE,
+		.cra_ctxsize		= sizeof(struct rk_cipher_ctx),
+		.cra_alignmask		= 0x0f,
+		.cra_type		= &crypto_ablkcipher_type,
+		.cra_module		= THIS_MODULE,
+		.cra_init		= rk_ablk_cra_init,
+		.cra_exit		= rk_ablk_cra_exit,
+		.cra_u.ablkcipher	= {
+			.min_keysize	= AES_MIN_KEY_SIZE,
+			.max_keysize	= AES_MAX_KEY_SIZE,
+			.setkey		= rk_aes_setkey,
+			.encrypt	= rk_aes_ecb_encrypt,
+			.decrypt	= rk_aes_ecb_decrypt,
+		}
+	}
+};
+
+struct rk_crypto_tmp rk_cbc_aes_alg = {
+	.alg = {
+		.cra_name		= "cbc(aes)",
+		.cra_driver_name	= "cbc-aes-rk",
+		.cra_priority		= 300,
+		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
+					  CRYPTO_ALG_ASYNC,
+		.cra_blocksize		= AES_BLOCK_SIZE,
+		.cra_ctxsize		= sizeof(struct rk_cipher_ctx),
+		.cra_alignmask		= 0x0f,
+		.cra_type		= &crypto_ablkcipher_type,
+		.cra_module		= THIS_MODULE,
+		.cra_init		= rk_ablk_cra_init,
+		.cra_exit		= rk_ablk_cra_exit,
+		.cra_u.ablkcipher	= {
+			.min_keysize	= AES_MIN_KEY_SIZE,
+			.max_keysize	= AES_MAX_KEY_SIZE,
+			.ivsize		= AES_BLOCK_SIZE,
+			.setkey		= rk_aes_setkey,
+			.encrypt	= rk_aes_cbc_encrypt,
+			.decrypt	= rk_aes_cbc_decrypt,
+		}
+	}
+};
+
+struct rk_crypto_tmp rk_ecb_des_alg = {
+	.alg = {
+		.cra_name		= "ecb(des)",
+		.cra_driver_name	= "ecb-des-rk",
+		.cra_priority		= 300,
+		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
+					  CRYPTO_ALG_ASYNC,
+		.cra_blocksize		= DES_BLOCK_SIZE,
+		.cra_ctxsize		= sizeof(struct rk_cipher_ctx),
+		.cra_alignmask		= 0x07,
+		.cra_type		= &crypto_ablkcipher_type,
+		.cra_module		= THIS_MODULE,
+		.cra_init		= rk_ablk_cra_init,
+		.cra_exit		= rk_ablk_cra_exit,
+		.cra_u.ablkcipher	= {
+			.min_keysize	= DES_KEY_SIZE,
+			.max_keysize	= DES_KEY_SIZE,
+			.setkey		= rk_tdes_setkey,
+			.encrypt	= rk_des_ecb_encrypt,
+			.decrypt	= rk_des_ecb_decrypt,
+		}
+	}
+};
+
+struct rk_crypto_tmp rk_cbc_des_alg = {
+	.alg = {
+		.cra_name		= "cbc(des)",
+		.cra_driver_name	= "cbc-des-rk",
+		.cra_priority		= 300,
+		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
+					  CRYPTO_ALG_ASYNC,
+		.cra_blocksize		= DES_BLOCK_SIZE,
+		.cra_ctxsize		= sizeof(struct rk_cipher_ctx),
+		.cra_alignmask		= 0x07,
+		.cra_type		= &crypto_ablkcipher_type,
+		.cra_module		= THIS_MODULE,
+		.cra_init		= rk_ablk_cra_init,
+		.cra_exit		= rk_ablk_cra_exit,
+		.cra_u.ablkcipher	= {
+			.min_keysize	= DES_KEY_SIZE,
+			.max_keysize	= DES_KEY_SIZE,
+			.ivsize		= DES_BLOCK_SIZE,
+			.setkey		= rk_tdes_setkey,
+			.encrypt	= rk_des_cbc_encrypt,
+			.decrypt	= rk_des_cbc_decrypt,
+		}
+	}
+};
+
+struct rk_crypto_tmp rk_ecb_des3_ede_alg = {
+	.alg = {
+		.cra_name		= "ecb(des3_ede)",
+		.cra_driver_name	= "ecb-des3-ede-rk",
+		.cra_priority		= 300,
+		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
+					  CRYPTO_ALG_ASYNC,
+		.cra_blocksize		= DES_BLOCK_SIZE,
+		.cra_ctxsize		= sizeof(struct rk_cipher_ctx),
+		.cra_alignmask		= 0x07,
+		.cra_type		= &crypto_ablkcipher_type,
+		.cra_module		= THIS_MODULE,
+		.cra_init		= rk_ablk_cra_init,
+		.cra_exit		= rk_ablk_cra_exit,
+		.cra_u.ablkcipher	= {
+			.min_keysize	= DES3_EDE_KEY_SIZE,
+			.max_keysize	= DES3_EDE_KEY_SIZE,
+			.ivsize		= DES_BLOCK_SIZE,
+			.setkey		= rk_tdes_setkey,
+			.encrypt	= rk_des3_ede_ecb_encrypt,
+			.decrypt	= rk_des3_ede_ecb_decrypt,
+		}
+	}
+};
+
+struct rk_crypto_tmp rk_cbc_des3_ede_alg = {
+	.alg = {
+		.cra_name		= "cbc(des3_ede)",
+		.cra_driver_name	= "cbc-des3-ede-rk",
+		.cra_priority		= 300,
+		.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER |
+					  CRYPTO_ALG_ASYNC,
+		.cra_blocksize		= DES_BLOCK_SIZE,
+		.cra_ctxsize		= sizeof(struct rk_cipher_ctx),
+		.cra_alignmask		= 0x07,
+		.cra_type		= &crypto_ablkcipher_type,
+		.cra_module		= THIS_MODULE,
+		.cra_init		= rk_ablk_cra_init,
+		.cra_exit		= rk_ablk_cra_exit,
+		.cra_u.ablkcipher	= {
+			.min_keysize	= DES3_EDE_KEY_SIZE,
+			.max_keysize	= DES3_EDE_KEY_SIZE,
+			.ivsize		= DES_BLOCK_SIZE,
+			.setkey		= rk_tdes_setkey,
+			.encrypt	= rk_des3_ede_cbc_encrypt,
+			.decrypt	= rk_des3_ede_cbc_decrypt,
+		}
+	}
+};
-- 
1.9.1

Re: [PATCH v3 3/4] Crypto: rockchip/crypto - add crypto driver for rk3288

[Heiko Stuebner]

Hi Zain,

I was able to sucessfully test your crypto-driver, but have found some
improvements below that should probably get looked at:

Am Mittwoch, 11. November 2015, 14:35:58 schrieb Zain Wang:
> Crypto driver support:
>      ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
> You can alloc tags above in your case.
> 
> And other algorithms and platforms will be added later on.
> 
> Signed-off-by: Zain Wang <zain.wang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---

[...]

> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
> new file mode 100644
> index 0000000..bb36baa
> --- /dev/null
> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
> @@ -0,0 +1,392 @@

[...]

> +static irqreturn_t crypto_irq_handle(int irq, void *dev_id)

that function should probably also get a "rk_" prefix?

> +{
> +	struct rk_crypto_info *dev  = platform_get_drvdata(dev_id);
> +	u32 interrupt_status;
> +	int err = 0;
> +
> +	spin_lock(&dev->lock);
> +
> +	if (irq == dev->irq) {

I'm not sure I understand that line. Interrupt handlers are only
called for the interrupt they are registered for, which would be dev->irq
in any case, so that should always be true and therefore be unnecessary?


> +		interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
> +		CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
> +		if (interrupt_status & 0x0a) {
> +			dev_warn(dev->dev, "DMA Error\n");
> +			err = -EFAULT;
> +		} else if (interrupt_status & 0x05) {
> +			err = dev->update(dev);
> +		}
> +
> +		if (err)
> +			dev->complete(dev, err);
> +	}
> +	spin_unlock(&dev->lock);
> +	return IRQ_HANDLED;
> +}

[...]

> +static int rk_crypto_probe(struct platform_device *pdev)
> +{
> +	struct resource *res;
> +	struct device *dev = &pdev->dev;
> +	struct rk_crypto_info *crypto_info;
> +	int err = 0;
> +
> +	crypto_info = devm_kzalloc(&pdev->dev,
> +				   sizeof(*crypto_info), GFP_KERNEL);
> +	if (!crypto_info) {
> +		err = -ENOMEM;
> +		goto err_crypto;
> +	}
> +
> +	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
> +	if (IS_ERR(crypto_info->rst)) {
> +		err = PTR_ERR(crypto_info->rst);
> +		goto err_crypto;
> +	}
> +
> +	reset_control_assert(crypto_info->rst);
> +	usleep_range(10, 20);
> +	reset_control_deassert(crypto_info->rst);
> +
> +	spin_lock_init(&crypto_info->lock);
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(crypto_info->reg)) {
> +		err = PTR_ERR(crypto_info->reg);
> +		goto err_ioremap;
> +	}
> +
> +	crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
> +	if (IS_ERR(crypto_info->aclk)) {
> +		err = PTR_ERR(crypto_info->aclk);
> +		goto err_ioremap;
> +	}
> +
> +	crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
> +	if (IS_ERR(crypto_info->hclk)) {
> +		err = PTR_ERR(crypto_info->hclk);
> +		goto err_ioremap;
> +	}
> +
> +	crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
> +	if (IS_ERR(crypto_info->sclk)) {
> +		err = PTR_ERR(crypto_info->sclk);
> +		goto err_ioremap;
> +	}
> +
> +	crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
> +	if (IS_ERR(crypto_info->dmaclk)) {
> +		err = PTR_ERR(crypto_info->dmaclk);
> +		goto err_ioremap;
> +	}
> +
> +	crypto_info->irq = platform_get_irq(pdev, 0);
> +	if (crypto_info->irq < 0) {
> +		dev_warn(crypto_info->dev,
> +			 "control Interrupt is not available.\n");
> +		err = crypto_info->irq;
> +		goto err_ioremap;
> +	}
> +
> +	err = devm_request_irq(&pdev->dev, crypto_info->irq, crypto_irq_handle,
> +			       IRQF_SHARED, "rk-crypto", pdev);

you are freeing the irq manually below and in _remove too. As it stands
with putting the ip block in reset again on remove this should either loose
the devm_ or you could add a devm_action that handles the reset assert
like in [0] - registering the devm_action above where the reset is done.
That way you could really use dev_request_irq and loose the free_irq
calls here and in remove.

[0] https://lkml.org/lkml/2015/11/8/159

[...]

> +static int rk_crypto_remove(struct platform_device *pdev)
> +{
> +	struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
> +
> +	rk_crypto_unregister();
> +	reset_control_assert(crypto_tmp->rst);

mainly my comment from above applies, but in any case the reset-assert
should definitly happen _after_ the tasklet is killed and the irq freed,
to make sure nothing will want to access device-registers anymore.

[devm works sequentially, so the devm_action would solve that automatically]


> +	tasklet_kill(&crypto_tmp->crypto_tasklet);
> +	free_irq(crypto_tmp->irq, crypto_tmp);
> +
> +	return 0;
> +}

[...]

> diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
> new file mode 100644
> index 0000000..b5b949a
> --- /dev/null
> +++ b/drivers/crypto/rockchip/rk3288_crypto.h
> @@ -0,0 +1,220 @@
> +#define _SBF(v, f)			((v) << (f))

you are using that macro in this header for simple value shifts like
	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		_SBF(0x01, 0)

Removing that macro and doing the shift regularly without any macro, like
	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		(0x01 << 0)

 would improve future readability, because now you need to look up what
the macro actually does and the _SBF macro also does not simplify anything.
Also that name is quite generic so may conflict with something else easily.

 [...]

> +#define CRYPTO_READ(dev, offset)		  \
> +		readl_relaxed(((dev)->reg + (offset)))
> +#define CRYPTO_WRITE(dev, offset, val)	  \
> +		writel_relaxed((val), ((dev)->reg + (offset)))
> +/* get register virt address */
> +#define CRYPTO_GET_REG_VIRT(dev, offset)   ((dev)->reg + (offset))

same argument as above about readability of the code. What do these
macros improve from just doing the readl and writel calls normally?


Thanks
Heiko
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Re: [PATCH v3 3/4] Crypto: rockchip/crypto - add crypto driver for rk3288

[Zain]

On 2015年11月12日 20:32, Heiko Stuebner wrote:
> Hi Zain,
>
> I was able to sucessfully test your crypto-driver, but have found some
> improvements below that should probably get looked at:
>
> Am Mittwoch, 11. November 2015, 14:35:58 schrieb Zain Wang:
>> Crypto driver support:
>>      ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
>> You can alloc tags above in your case.
>>
>> And other algorithms and platforms will be added later on.
>>
>> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
>> ---
> [...]
>
>> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
>> new file mode 100644
>> index 0000000..bb36baa
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
>> @@ -0,0 +1,392 @@
> [...]
>
>> +static irqreturn_t crypto_irq_handle(int irq, void *dev_id)
> that function should probably also get a "rk_" prefix?
OK! good idea.
I will add it to next version.
>> +{
>> +	struct rk_crypto_info *dev  = platform_get_drvdata(dev_id);
>> +	u32 interrupt_status;
>> +	int err = 0;
>> +
>> +	spin_lock(&dev->lock);
>> +
>> +	if (irq == dev->irq) {
> I'm not sure I understand that line. Interrupt handlers are only
> called for the interrupt they are registered for, which would be dev->irq
> in any case, so that should always be true and therefore be unnecessary?
You are right, it is unnecessary.
 It will be remove in next version.
>
>> +		interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
>> +		CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
>> +		if (interrupt_status & 0x0a) {
>> +			dev_warn(dev->dev, "DMA Error\n");
>> +			err = -EFAULT;
>> +		} else if (interrupt_status & 0x05) {
>> +			err = dev->update(dev);
>> +		}
>> +
>> +		if (err)
>> +			dev->complete(dev, err);
>> +	}
>> +	spin_unlock(&dev->lock);
>> +	return IRQ_HANDLED;
>> +}
> [...]
>
>> +static int rk_crypto_probe(struct platform_device *pdev)
>> +{
>> +	struct resource *res;
>> +	struct device *dev = &pdev->dev;
>> +	struct rk_crypto_info *crypto_info;
>> +	int err = 0;
>> +
>> +	crypto_info = devm_kzalloc(&pdev->dev,
>> +				   sizeof(*crypto_info), GFP_KERNEL);
>> +	if (!crypto_info) {
>> +		err = -ENOMEM;
>> +		goto err_crypto;
>> +	}
>> +
>> +	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
>> +	if (IS_ERR(crypto_info->rst)) {
>> +		err = PTR_ERR(crypto_info->rst);
>> +		goto err_crypto;
>> +	}
>> +
>> +	reset_control_assert(crypto_info->rst);
>> +	usleep_range(10, 20);
>> +	reset_control_deassert(crypto_info->rst);
>> +
>> +	spin_lock_init(&crypto_info->lock);
>> +
>> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +	crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
>> +	if (IS_ERR(crypto_info->reg)) {
>> +		err = PTR_ERR(crypto_info->reg);
>> +		goto err_ioremap;
>> +	}
>> +
>> +	crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
>> +	if (IS_ERR(crypto_info->aclk)) {
>> +		err = PTR_ERR(crypto_info->aclk);
>> +		goto err_ioremap;
>> +	}
>> +
>> +	crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
>> +	if (IS_ERR(crypto_info->hclk)) {
>> +		err = PTR_ERR(crypto_info->hclk);
>> +		goto err_ioremap;
>> +	}
>> +
>> +	crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
>> +	if (IS_ERR(crypto_info->sclk)) {
>> +		err = PTR_ERR(crypto_info->sclk);
>> +		goto err_ioremap;
>> +	}
>> +
>> +	crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
>> +	if (IS_ERR(crypto_info->dmaclk)) {
>> +		err = PTR_ERR(crypto_info->dmaclk);
>> +		goto err_ioremap;
>> +	}
>> +
>> +	crypto_info->irq = platform_get_irq(pdev, 0);
>> +	if (crypto_info->irq < 0) {
>> +		dev_warn(crypto_info->dev,
>> +			 "control Interrupt is not available.\n");
>> +		err = crypto_info->irq;
>> +		goto err_ioremap;
>> +	}
>> +
>> +	err = devm_request_irq(&pdev->dev, crypto_info->irq, crypto_irq_handle,
>> +			       IRQF_SHARED, "rk-crypto", pdev);
> you are freeing the irq manually below and in _remove too. As it stands
> with putting the ip block in reset again on remove this should either loose
> the devm_ or you could add a devm_action that handles the reset assert
> like in [0] - registering the devm_action above where the reset is done.
> That way you could really use dev_request_irq and loose the free_irq
> calls here and in remove.
>
> [0] https://lkml.org/lkml/2015/11/8/159
I made a mistake here. I did not remove free_irq when using
devm_request_irq.

As I do not konw enough about devm_action and reset-assert , can I
remove free_irq
simply like drivers/i2c/buses/i2c-sun6i-p2wi.c used devm_request_irq and
reset_assert?
>
> [...]
>
>> +static int rk_crypto_remove(struct platform_device *pdev)
>> +{
>> +	struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
>> +
>> +	rk_crypto_unregister();
>> +	reset_control_assert(crypto_tmp->rst);
> mainly my comment from above applies, but in any case the reset-assert
> should definitly happen _after_ the tasklet is killed and the irq freed,
> to make sure nothing will want to access device-registers anymore.
>
> [devm works sequentially, so the devm_action would solve that automatically]
As I said above, it seem unnecessary to add devm_action.

And if modification above is good, I will push tasklet_kill before
reset_control_assert in next version.
>
>> +	tasklet_kill(&crypto_tmp->crypto_tasklet);
>> +	free_irq(crypto_tmp->irq, crypto_tmp);
>> +
>> +	return 0;
>> +}
> [...]
>
>> diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
>> new file mode 100644
>> index 0000000..b5b949a
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/rk3288_crypto.h
>> @@ -0,0 +1,220 @@
>> +#define _SBF(v, f)			((v) << (f))
> you are using that macro in this header for simple value shifts like
> 	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		_SBF(0x01, 0)
>
> Removing that macro and doing the shift regularly without any macro, like
> 	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		(0x01 << 0)
>
>  would improve future readability, because now you need to look up what
> the macro actually does and the _SBF macro also does not simplify anything.
> Also that name is quite generic so may conflict with something else easily.
Ok! Done!
>  [...]
>
>> +#define CRYPTO_READ(dev, offset)		  \
>> +		readl_relaxed(((dev)->reg + (offset)))
>> +#define CRYPTO_WRITE(dev, offset, val)	  \
>> +		writel_relaxed((val), ((dev)->reg + (offset)))
>> +/* get register virt address */
>> +#define CRYPTO_GET_REG_VIRT(dev, offset)   ((dev)->reg + (offset))
> same argument as above about readability of the code. What do these
> macros improve from just doing the readl and writel calls normally?
I am sorry that this macro is define for hash and not be used here.
because there are some continuous registers in hash,
I think we can use this macro with memcpy like
        output = CRYPTO_GET_REG_VIRT(dev, RK_CRYPTO_HASH_DOUT_0);
        memcpy(dev->ahash_req->result, output,
crypto_ahash_digestsize(tfm));
instead of multiple readl.

I will remove it in next version and add it to hash patch later on.
>
> Thanks
> Heiko
>
>
>
Thanks
Zain

Re: [PATCH v3 3/4] Crypto: rockchip/crypto - add crypto driver for rk3288

[Heiko Stuebner]

Hi Zain,

Am Freitag, 13. November 2015, 14:44:43 schrieb Zain:
> 
> On 2015年11月12日 20:32, Heiko Stuebner wrote:
> > Hi Zain,
> >
> > I was able to sucessfully test your crypto-driver, but have found some
> > improvements below that should probably get looked at:
> >
> > Am Mittwoch, 11. November 2015, 14:35:58 schrieb Zain Wang:
> >> Crypto driver support:
> >>      ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
> >> You can alloc tags above in your case.
> >>
> >> And other algorithms and platforms will be added later on.
> >>
> >> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
> >> ---
> > [...]
> >
> >> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
> >> new file mode 100644
> >> index 0000000..bb36baa
> >> --- /dev/null
> >> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
> >> @@ -0,0 +1,392 @@

[...]

static void rk_crypto_action(void *data)
{
	struct rk_crypto_info *crypto_info = data;

	reset_control_assert(crypto_info->rst);
}

> >> +static int rk_crypto_probe(struct platform_device *pdev)
> >> +{
> >> +	struct resource *res;
> >> +	struct device *dev = &pdev->dev;
> >> +	struct rk_crypto_info *crypto_info;
> >> +	int err = 0;
> >> +
> >> +	crypto_info = devm_kzalloc(&pdev->dev,
> >> +				   sizeof(*crypto_info), GFP_KERNEL);
> >> +	if (!crypto_info) {
> >> +		err = -ENOMEM;
> >> +		goto err_crypto;
> >> +	}
> >> +
> >> +	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
> >> +	if (IS_ERR(crypto_info->rst)) {
> >> +		err = PTR_ERR(crypto_info->rst);
> >> +		goto err_crypto;
> >> +	}
> >> +
> >> +	reset_control_assert(crypto_info->rst);
> >> +	usleep_range(10, 20);
> >> +	reset_control_deassert(crypto_info->rst);

	err = devm_add_action(dev, rk_crypto_action, crypto_info);
	if (err) {
		reset_control_assert(crypto_info->rst);
		return err;
	}

from here onwards the devm_action will always be executed when either
_probe fails, or after remove finishes, so no need to assert the reset
manually.

> >> +
> >> +	spin_lock_init(&crypto_info->lock);
> >> +
> >> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> >> +	crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
> >> +	if (IS_ERR(crypto_info->reg)) {
> >> +		err = PTR_ERR(crypto_info->reg);
> >> +		goto err_ioremap;
> >> +	}
> >> +
> >> +	crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
> >> +	if (IS_ERR(crypto_info->aclk)) {
> >> +		err = PTR_ERR(crypto_info->aclk);
> >> +		goto err_ioremap;
> >> +	}
> >> +
> >> +	crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
> >> +	if (IS_ERR(crypto_info->hclk)) {
> >> +		err = PTR_ERR(crypto_info->hclk);
> >> +		goto err_ioremap;
> >> +	}
> >> +
> >> +	crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
> >> +	if (IS_ERR(crypto_info->sclk)) {
> >> +		err = PTR_ERR(crypto_info->sclk);
> >> +		goto err_ioremap;
> >> +	}
> >> +
> >> +	crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
> >> +	if (IS_ERR(crypto_info->dmaclk)) {
> >> +		err = PTR_ERR(crypto_info->dmaclk);
> >> +		goto err_ioremap;
> >> +	}
> >> +
> >> +	crypto_info->irq = platform_get_irq(pdev, 0);
> >> +	if (crypto_info->irq < 0) {
> >> +		dev_warn(crypto_info->dev,
> >> +			 "control Interrupt is not available.\n");
> >> +		err = crypto_info->irq;
> >> +		goto err_ioremap;
> >> +	}
> >> +
> >> +	err = devm_request_irq(&pdev->dev, crypto_info->irq, crypto_irq_handle,
> >> +			       IRQF_SHARED, "rk-crypto", pdev);
> > you are freeing the irq manually below and in _remove too. As it stands
> > with putting the ip block in reset again on remove this should either loose
> > the devm_ or you could add a devm_action that handles the reset assert
> > like in [0] - registering the devm_action above where the reset is done.
> > That way you could really use dev_request_irq and loose the free_irq
> > calls here and in remove.
> >
> > [0] https://lkml.org/lkml/2015/11/8/159
> I made a mistake here. I did not remove free_irq when using
> devm_request_irq.
> 
> As I do not konw enough about devm_action and reset-assert , can I
> remove free_irq
> simply like drivers/i2c/buses/i2c-sun6i-p2wi.c used devm_request_irq and
> reset_assert?

I did insert suitable code on how that could look a bit above :-)

> >
> > [...]
> >
> >> +static int rk_crypto_remove(struct platform_device *pdev)
> >> +{
> >> +	struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
> >> +
> >> +	rk_crypto_unregister();
> >> +	reset_control_assert(crypto_tmp->rst);
> > mainly my comment from above applies, but in any case the reset-assert
> > should definitly happen _after_ the tasklet is killed and the irq freed,
> > to make sure nothing will want to access device-registers anymore.
> >
> > [devm works sequentially, so the devm_action would solve that automatically]
> As I said above, it seem unnecessary to add devm_action.
> 
> And if modification above is good, I will push tasklet_kill before
> reset_control_assert in next version.

I'm unsure ... but I guess if you move the reset-assert after the
tasklet_kill it might be ok.

> >
> >> +	tasklet_kill(&crypto_tmp->crypto_tasklet);
> >> +	free_irq(crypto_tmp->irq, crypto_tmp);
> >> +
> >> +	return 0;
> >> +}
> > [...]
> >
> >> diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
> >> new file mode 100644
> >> index 0000000..b5b949a
> >> --- /dev/null
> >> +++ b/drivers/crypto/rockchip/rk3288_crypto.h
> >> @@ -0,0 +1,220 @@
> >> +#define _SBF(v, f)			((v) << (f))
> > you are using that macro in this header for simple value shifts like
> > 	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		_SBF(0x01, 0)
> >
> > Removing that macro and doing the shift regularly without any macro, like
> > 	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		(0x01 << 0)
> >
> >  would improve future readability, because now you need to look up what
> > the macro actually does and the _SBF macro also does not simplify anything.
> > Also that name is quite generic so may conflict with something else easily.
> Ok! Done!
> >  [...]
> >
> >> +#define CRYPTO_READ(dev, offset)		  \
> >> +		readl_relaxed(((dev)->reg + (offset)))
> >> +#define CRYPTO_WRITE(dev, offset, val)	  \
> >> +		writel_relaxed((val), ((dev)->reg + (offset)))
> >> +/* get register virt address */
> >> +#define CRYPTO_GET_REG_VIRT(dev, offset)   ((dev)->reg + (offset))
> > same argument as above about readability of the code. What do these
> > macros improve from just doing the readl and writel calls normally?
> I am sorry that this macro is define for hash and not be used here.
> because there are some continuous registers in hash,
> I think we can use this macro with memcpy like
>         output = CRYPTO_GET_REG_VIRT(dev, RK_CRYPTO_HASH_DOUT_0);
>         memcpy(dev->ahash_req->result, output,
> crypto_ahash_digestsize(tfm));
> instead of multiple readl.
> 
> I will remove it in next version and add it to hash patch later on.

I actuall meant all 3 of those macros :-) ... all of them just diguise
what the code actually does, so don't provide additional value over
just using readl_relaxed etc directly.


Heiko

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Re: [PATCH v3 3/4] Crypto: rockchip/crypto - add crypto driver for rk3288

[Zain]

On 2015年11月15日 06:41, Heiko Stuebner wrote:
> Hi Zain,
>
> Am Freitag, 13. November 2015, 14:44:43 schrieb Zain:
>> On 2015年11月12日 20:32, Heiko Stuebner wrote:
>>> Hi Zain,
>>>
>>> I was able to sucessfully test your crypto-driver, but have found some
>>> improvements below that should probably get looked at:
>>>
>>> Am Mittwoch, 11. November 2015, 14:35:58 schrieb Zain Wang:
>>>> Crypto driver support:
>>>>      ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
>>>> You can alloc tags above in your case.
>>>>
>>>> And other algorithms and platforms will be added later on.
>>>>
>>>> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
>>>> ---
>>> [...]
>>>
>>>> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
>>>> new file mode 100644
>>>> index 0000000..bb36baa
>>>> --- /dev/null
>>>> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
>>>> @@ -0,0 +1,392 @@
> [...]
>
> static void rk_crypto_action(void *data)
> {
> 	struct rk_crypto_info *crypto_info = data;
>
> 	reset_control_assert(crypto_info->rst);
> }
>
>>>> +static int rk_crypto_probe(struct platform_device *pdev)
>>>> +{
>>>> +	struct resource *res;
>>>> +	struct device *dev = &pdev->dev;
>>>> +	struct rk_crypto_info *crypto_info;
>>>> +	int err = 0;
>>>> +
>>>> +	crypto_info = devm_kzalloc(&pdev->dev,
>>>> +				   sizeof(*crypto_info), GFP_KERNEL);
>>>> +	if (!crypto_info) {
>>>> +		err = -ENOMEM;
>>>> +		goto err_crypto;
>>>> +	}
>>>> +
>>>> +	crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
>>>> +	if (IS_ERR(crypto_info->rst)) {
>>>> +		err = PTR_ERR(crypto_info->rst);
>>>> +		goto err_crypto;
>>>> +	}
>>>> +
>>>> +	reset_control_assert(crypto_info->rst);
>>>> +	usleep_range(10, 20);
>>>> +	reset_control_deassert(crypto_info->rst);
> 	err = devm_add_action(dev, rk_crypto_action, crypto_info);
> 	if (err) {
> 		reset_control_assert(crypto_info->rst);
> 		return err;
> 	}
>
> from here onwards the devm_action will always be executed when either
> _probe fails, or after remove finishes, so no need to assert the reset
> manually.
I have known this function,
rk_crypto_action will be executed next to either failed _probe, or
_remove automatically.
It also make sure reset_control_assert can be executed after tasklet_kill.

OK! Done!
>
>>>> +
>>>> +	spin_lock_init(&crypto_info->lock);
>>>> +
>>>> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>>> +	crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
>>>> +	if (IS_ERR(crypto_info->reg)) {
>>>> +		err = PTR_ERR(crypto_info->reg);
>>>> +		goto err_ioremap;
>>>> +	}
>>>> +
>>>> +	crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
>>>> +	if (IS_ERR(crypto_info->aclk)) {
>>>> +		err = PTR_ERR(crypto_info->aclk);
>>>> +		goto err_ioremap;
>>>> +	}
>>>> +
>>>> +	crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
>>>> +	if (IS_ERR(crypto_info->hclk)) {
>>>> +		err = PTR_ERR(crypto_info->hclk);
>>>> +		goto err_ioremap;
>>>> +	}
>>>> +
>>>> +	crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
>>>> +	if (IS_ERR(crypto_info->sclk)) {
>>>> +		err = PTR_ERR(crypto_info->sclk);
>>>> +		goto err_ioremap;
>>>> +	}
>>>> +
>>>> +	crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
>>>> +	if (IS_ERR(crypto_info->dmaclk)) {
>>>> +		err = PTR_ERR(crypto_info->dmaclk);
>>>> +		goto err_ioremap;
>>>> +	}
>>>> +
>>>> +	crypto_info->irq = platform_get_irq(pdev, 0);
>>>> +	if (crypto_info->irq < 0) {
>>>> +		dev_warn(crypto_info->dev,
>>>> +			 "control Interrupt is not available.\n");
>>>> +		err = crypto_info->irq;
>>>> +		goto err_ioremap;
>>>> +	}
>>>> +
>>>> +	err = devm_request_irq(&pdev->dev, crypto_info->irq, crypto_irq_handle,
>>>> +			       IRQF_SHARED, "rk-crypto", pdev);
>>> you are freeing the irq manually below and in _remove too. As it stands
>>> with putting the ip block in reset again on remove this should either loose
>>> the devm_ or you could add a devm_action that handles the reset assert
>>> like in [0] - registering the devm_action above where the reset is done.
>>> That way you could really use dev_request_irq and loose the free_irq
>>> calls here and in remove.
>>>
>>> [0] https://lkml.org/lkml/2015/11/8/159
>> I made a mistake here. I did not remove free_irq when using
>> devm_request_irq.
>>
>> As I do not konw enough about devm_action and reset-assert , can I
>> remove free_irq
>> simply like drivers/i2c/buses/i2c-sun6i-p2wi.c used devm_request_irq and
>> reset_assert?
> I did insert suitable code on how that could look a bit above :-)
Thanks, done!
>
>>> [...]
>>>
>>>> +static int rk_crypto_remove(struct platform_device *pdev)
>>>> +{
>>>> +	struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
>>>> +
>>>> +	rk_crypto_unregister();
>>>> +	reset_control_assert(crypto_tmp->rst);
>>> mainly my comment from above applies, but in any case the reset-assert
>>> should definitly happen _after_ the tasklet is killed and the irq freed,
>>> to make sure nothing will want to access device-registers anymore.
>>>
>>> [devm works sequentially, so the devm_action would solve that automatically]
>> As I said above, it seem unnecessary to add devm_action.
>>
>> And if modification above is good, I will push tasklet_kill before
>> reset_control_assert in next version.
> I'm unsure ... but I guess if you move the reset-assert after the
> tasklet_kill it might be ok.
I guess I can remove it if I added code you provided above since
reset-assert will be
executed after _remove by rk_crypto_action.
>
>>>> +	tasklet_kill(&crypto_tmp->crypto_tasklet);
>>>> +	free_irq(crypto_tmp->irq, crypto_tmp);
>>>> +
>>>> +	return 0;
>>>> +}
>>> [...]
>>>
>>>> diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h
>>>> new file mode 100644
>>>> index 0000000..b5b949a
>>>> --- /dev/null
>>>> +++ b/drivers/crypto/rockchip/rk3288_crypto.h
>>>> @@ -0,0 +1,220 @@
>>>> +#define _SBF(v, f)			((v) << (f))
>>> you are using that macro in this header for simple value shifts like
>>> 	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		_SBF(0x01, 0)
>>>
>>> Removing that macro and doing the shift regularly without any macro, like
>>> 	#define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT		(0x01 << 0)
>>>
>>>  would improve future readability, because now you need to look up what
>>> the macro actually does and the _SBF macro also does not simplify anything.
>>> Also that name is quite generic so may conflict with something else easily.
>> Ok! Done!
>>>  [...]
>>>
>>>> +#define CRYPTO_READ(dev, offset)		  \
>>>> +		readl_relaxed(((dev)->reg + (offset)))
>>>> +#define CRYPTO_WRITE(dev, offset, val)	  \
>>>> +		writel_relaxed((val), ((dev)->reg + (offset)))
>>>> +/* get register virt address */
>>>> +#define CRYPTO_GET_REG_VIRT(dev, offset)   ((dev)->reg + (offset))
>>> same argument as above about readability of the code. What do these
>>> macros improve from just doing the readl and writel calls normally?
>> I am sorry that this macro is define for hash and not be used here.
>> because there are some continuous registers in hash,
>> I think we can use this macro with memcpy like
>>         output = CRYPTO_GET_REG_VIRT(dev, RK_CRYPTO_HASH_DOUT_0);
>>         memcpy(dev->ahash_req->result, output,
>> crypto_ahash_digestsize(tfm));
>> instead of multiple readl.
>>
>> I will remove it in next version and add it to hash patch later on.
> I actuall meant all 3 of those macros :-) ... all of them just diguise
> what the code actually does, so don't provide additional value over
> just using readl_relaxed etc directly.
Right.

Thanks
Zain

[PATCH v3 4/4] ARM: dts: rockchip: Add Crypto node for rk3288

[Zain Wang]

Add Crypto node for rk3288 including crypto controller and dma clk.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
---
Changed in v3:
- add reset property

Changed in v2:
- None

Changed in v1:
- remove the _crypto suffix
- use "rockchip,rk3288-crypto" instead of "rockchip,rk3288"

 arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 6a79c9c..f0d1217 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -778,6 +778,18 @@
 		status = "disabled";
 	};
 
+	crypto: cypto-controller@ff8a0000 {
+		compatible = "rockchip,rk3288-crypto";
+		reg = <0xff8a0000 0x4000>;
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
+			 <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
+		clock-names = "aclk", "hclk", "sclk", "apb_pclk";
+		resets = <&cru SRST_CRYPTO>;
+		reset-names = "crypto-rst";
+		status = "okay";
+	};
+
 	vopb: vop@ff930000 {
 		compatible = "rockchip,rk3288-vop";
 		reg = <0xff930000 0x19c>;
-- 
1.9.1

Re: [PATCH v3 4/4] ARM: dts: rockchip: Add Crypto node for rk3288

[Heiko Stuebner]

Am Mittwoch, 11. November 2015, 14:35:59 schrieb Zain Wang:
> Add Crypto node for rk3288 including crypto controller and dma clk.
> 
> Signed-off-by: Zain Wang <zain.wang@rock-chips.com>

I'd like to pick this one and the clock-patch2 up, once the crypto
driver itself got accepted and we have an Ack from the clock-maintainers
for the clock-id patch.


Heiko

> ---
> Changed in v3:
> - add reset property
> 
> Changed in v2:
> - None
> 
> Changed in v1:
> - remove the _crypto suffix
> - use "rockchip,rk3288-crypto" instead of "rockchip,rk3288"
> 
>  arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 6a79c9c..f0d1217 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -778,6 +778,18 @@
>  		status = "disabled";
>  	};
>  
> +	crypto: cypto-controller@ff8a0000 {
> +		compatible = "rockchip,rk3288-crypto";
> +		reg = <0xff8a0000 0x4000>;
> +		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
> +			 <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
> +		clock-names = "aclk", "hclk", "sclk", "apb_pclk";
> +		resets = <&cru SRST_CRYPTO>;
> +		reset-names = "crypto-rst";
> +		status = "okay";
> +	};
> +
>  	vopb: vop@ff930000 {
>  		compatible = "rockchip,rk3288-vop";
>  		reg = <0xff930000 0x19c>;
> 

Re: [PATCH v3 0/4] crypto: add crypto accelerator support for rk3288

[Heiko Stuebner]

Am Mittwoch, 11. November 2015, 14:35:55 schrieb Zain Wang:
> This commit support three cipher(AES/DES/DES3) and two chainmode(ecb/cbc),
> and the more algorithms and new hash drivers will be added later on.

I gave this a spin using tcrypt on my rk3288 chromebook and it seems to
work nicely for modes 200 (aes), 201 (des3) and 204 (des), so this series

Tested-by: Heiko Stuebner <heiko@sntech.de>

> 
> Changed in v3:
> - add OF depended in Kconfig
> - rename some variate
> - add reset property
> - remove crypto_p variate
> 
> Changed in v2:
> - remove some part about hash
> - add weak key detection
> - changed some variate's type
> 
> Changed in v1:
> - modify some variate's name
> - modify some variate's type
> - modify some return value
> - remove or modify some print info
> - use more dev_xxx in probe
> - modify the prio of cipher
> - add Kconfig
> 
> Zain Wang (4):
>   crypto: rockchip/crypto - add DT bindings documentation
>   clk: rockchip: set an ID for crypto clk
>   Crypto: rockchip/crypto - add crypto driver for rk3288
>   ARM: dts: rockchip: Add Crypto node for rk3288
> 
>  .../devicetree/bindings/crypto/rockchip-crypto.txt |  29 ++
>  arch/arm/boot/dts/rk3288.dtsi                      |  12 +
>  drivers/clk/rockchip/clk-rk3288.c                  |   2 +-
>  drivers/crypto/Kconfig                             |  11 +
>  drivers/crypto/Makefile                            |   1 +
>  drivers/crypto/rockchip/Makefile                   |   3 +
>  drivers/crypto/rockchip/rk3288_crypto.c            | 392 +++++++++++++++
>  drivers/crypto/rockchip/rk3288_crypto.h            | 220 +++++++++
>  drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 527 +++++++++++++++++++++
>  include/dt-bindings/clock/rk3288-cru.h             |   1 +
>  10 files changed, 1197 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
>  create mode 100644 drivers/crypto/rockchip/Makefile
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
> 
>