From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ariel D'Alessandro Subject: [PATCH 1/3] ARM: dts: lpc4337-ciaa: enable EEPROM memory Date: Mon, 23 Nov 2015 09:37:03 -0300 Message-ID: <1448282225-2635-2-git-send-email-ariel@vanguardiasur.com.ar> References: <1448282225-2635-1-git-send-email-ariel@vanguardiasur.com.ar> Return-path: In-Reply-To: <1448282225-2635-1-git-send-email-ariel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Jmanabian-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org, Ariel D'Alessandro List-Id: devicetree@vger.kernel.org The CIAA-NXP board has a NXP LPC4337 SoC that includes a 16 KiB EEPROM memory. Signed-off-by: Ariel D'Alessandro --- arch/arm/boot/dts/lpc4337-ciaa.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/lpc4337-ciaa.dts b/arch/arm/boot/dts/lpc4337-ciaa.dts index 5f500c1..03bdf77 100644 --- a/arch/arm/boot/dts/lpc4337-ciaa.dts +++ b/arch/arm/boot/dts/lpc4337-ciaa.dts @@ -155,6 +155,10 @@ }; }; +&eeprom { + status = "okay"; +}; + &enet_tx_clk { clock-frequency = <50000000>; }; -- 2.6.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html