From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Liao Subject: Re: [PATCH v6 11/12] clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output Date: Thu, 26 Nov 2015 14:02:04 +0800 Message-ID: <1448517724.16568.1.camel@mtksdaap41> References: <1447868060-11620-1-git-send-email-p.zabel@pengutronix.de> <1447868060-11620-12-git-send-email-p.zabel@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1447868060-11620-12-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Philipp Zabel Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Paul Bolle , YT Shen , Jitao Shi , Jie Qiu , Pawel Moll , Ian Campbell , Cawa Cheng , Daniel Stone , CK Hu , Rob Herring , linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Daniel Vetter , Kumar Gala , Matthias Brugger , Dave Airlie , kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org List-Id: devicetree@vger.kernel.org On Wed, 2015-11-18 at 18:34 +0100, Philipp Zabel wrote: > The configurable hdmi_ref output of the PLL block is derived from > the tvdpll_594m clock signal via a configurable PLL post-divider. > It is used as the PLL reference input to the HDMI PHY module. > > Signed-off-by: Philipp Zabel Acked-by: James Liao > --- > drivers/clk/mediatek/clk-mt8173.c | 5 +++++ > include/dt-bindings/clock/mt8173-clk.h | 3 ++- > 2 files changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c > index b305fa2..d7eadda 100644 > --- a/drivers/clk/mediatek/clk-mt8173.c > +++ b/drivers/clk/mediatek/clk-mt8173.c > @@ -1091,6 +1091,11 @@ static void __init mtk_apmixedsys_init(struct device_node *node) > clk_data->clks[cku->id] = clk; > } > > + clk = clk_register_divider(NULL, "hdmi_ref", "tvdpll_594m", 0, > + base + 0x40, 16, 3, CLK_DIVIDER_POWER_OF_TWO, > + NULL); > + clk_data->clks[CLK_APMIXED_HDMI_REF] = clk; > + > r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); > if (r) > pr_err("%s(): could not register clock provider: %d\n", > diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h > index 7956ba1..6094bf7 100644 > --- a/include/dt-bindings/clock/mt8173-clk.h > +++ b/include/dt-bindings/clock/mt8173-clk.h > @@ -176,7 +176,8 @@ > #define CLK_APMIXED_LVDSPLL 13 > #define CLK_APMIXED_MSDCPLL2 14 > #define CLK_APMIXED_REF2USB_TX 15 > -#define CLK_APMIXED_NR_CLK 16 > +#define CLK_APMIXED_HDMI_REF 16 > +#define CLK_APMIXED_NR_CLK 17 > > /* INFRA_SYS */ > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html