From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen-Yu Tsai Subject: [PATCH 2/7] ARM: dts: sun9i: Add A80 R_PIO pin controller device node Date: Tue, 1 Dec 2015 13:47:20 +0800 Message-ID: <1448948845-28347-3-git-send-email-wens@csie.org> References: <1448948845-28347-1-git-send-email-wens@csie.org> Reply-To: wens-jdAy2FN1RRM@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: <1448948845-28347-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Maxime Ripard , Linus Walleij , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Cc: Chen-Yu Tsai , linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org The A80 has a secondary pin controller. Add a device node for it. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun9i-a80.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index eb69a62f6bc4..d02ee5d520e2 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -868,5 +868,19 @@ resets = <&apbs_rst 4>; status = "disabled"; }; + + r_pio: pinctrl@08002c00 { + compatible = "allwinner,sun9i-a80-r-pinctrl"; + reg = <0x08002c00 0x400>; + interrupts = , + ; + clocks = <&apbs_gates 0>; + resets = <&apbs_rst 0>; + gpio-controller; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #gpio-cells = <3>; + }; }; }; -- 2.6.2