From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kapil Hali Subject: [PATCH v6 3/5] ARM: dts: Add SMP support for Broadcom NSP Date: Sat, 5 Dec 2015 06:53:42 -0500 Message-ID: <1449316424-14549-4-git-send-email-kapilh@broadcom.com> References: <1449316424-14549-1-git-send-email-kapilh@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1449316424-14549-1-git-send-email-kapilh@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Ray Jui , Scott Branden , Jon Mason , Florian Fainelli Cc: Gregory Fong , Lee Jones , Hauke Mehrtens , Kever Yang , Maxime Ripard , Olof Johansson , Paul Walmsley , Linus Walleij , Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, Kapil Hali List-Id: devicetree@vger.kernel.org Add device tree changes required for providing SMP support for Broadcom Northstar Plus SoC. Signed-off-by: Kapil Hali --- arch/arm/boot/dts/bcm-nsp.dtsi | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 58aca27..d9f8b31 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -40,24 +40,33 @@ model = "Broadcom Northstar Plus SoC"; interrupt-parent = <&gic>; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + enable-method = "brcm,bcm-nsp-smp"; + secondary-boot-reg = <0xffff042c>; + reg = <0x1>; + }; + }; + mpcore { compatible = "simple-bus"; ranges = <0x00000000 0x19020000 0x00003000>; #address-cells = <1>; #size-cells = <1>; - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x0>; - }; - }; - L2: l2-cache { compatible = "arm,pl310-cache"; reg = <0x2000 0x1000>; -- 2.1.0