[PATCH 0/3] pinctrl: lpc18xx: support pint setup

[PATCH 0/3] pinctrl: lpc18xx: support pint setup

[Joachim Eastwood]

Some background here:
The LPC1850 has no less than 3 GPIO interrupt blocks. One of these
blocks is called 'gpio pin interrupt' or just PINT. LPC1850 PINT can
handle up to 8 interrupts and these have a one-to-one relationship with
the main interrupt controller (NVIC).

Selecting which GPIOs that are associated with PINT irq lines is done in
pinctrl hw block (SCU). The pinctrl device usually deals with the pin
namespace but PINT selecction is done in the GPIO namespace. Fortunatly
there is a function that can translate from the pin namespace to the
GPIO namespace.

Selection is done in DT with the "nxp,gpio-pin-interrupt" property.
Example usage;
&pinctrl {
	gpio_joystick_1_cfg {
		pins =  "p9_0";
		function = "gpio";
		nxp,gpio-pin-interrupt = <0>;
		input-enable;
		bias-disable;
	};
};

The reason for not doing this irq line selection on the fly in the
irqchip driver is that the registers lie in the SCU hw block not in the
PINT block and DT gives you more control since you can select a specific
irq lines easily.

The irq chip driver is ready but will posted separetly.

Linus; Take a careful look at patch 1 as this one deals with a pinctrl
locking issue I encountered when trying to use the pinctrl to gpio
function. I am not that familiar with pinctrl locking so please advice.


Joachim Eastwood (3):
  pinctrl: core: create unlocked version of pinctrl_find_gpio_range_from_pin
  pinctrl: lpc18xx: add nxp,gpio-pin-interrupt property
  pinctrl: lpc1850-scu: document nxp,gpio-pin-interrupt

 .../bindings/pinctrl/nxp,lpc1850-scu.txt           |  14 ++
 drivers/pinctrl/core.c                             |  25 +++-
 drivers/pinctrl/core.h                             |   4 +
 drivers/pinctrl/pinctrl-lpc18xx.c                  | 144 ++++++++++++++++++++-
 4 files changed, 174 insertions(+), 13 deletions(-)

-- 
1.8.0

[PATCH 3/3] pinctrl: lpc1850-scu: document nxp,gpio-pin-interrupt

[Joachim Eastwood]

Update devicetree documention for lpc1850-scu with the new
nxp,gpio-pin-interrupt property.

Signed-off-by: Joachim Eastwood <manabian-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 .../devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt        | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt b/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt
index df0309c57505..bd8b0c69fa44 100644
--- a/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt
@@ -22,6 +22,10 @@ The following generic nodes are supported:
  - input-schmitt-disable
  - slew-rate
 
+NXP specific properties:
+ - nxp,gpio-pin-interrupt : Assign pin to gpio pin interrupt controller
+			    irq number 0 to 7. See example below.
+
 Not all pins support all properties so either refer to the NXP 1850/4350
 user manual or the pin table in the pinctrl-lpc18xx driver for supported
 pin properties.
@@ -54,4 +58,14 @@ pinctrl: pinctrl@40086000 {
 			bias-disable;
 		};
 	};
+
+	gpio_joystick_pins: gpio-joystick-pins {
+		gpio_joystick_1_cfg {
+			pins =  "p9_0";
+			function = "gpio";
+			nxp,gpio-pin-interrupt = <0>;
+			input-enable;
+			bias-disable;
+		};
+	};
 };
-- 
1.8.0

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 3/3] pinctrl: lpc1850-scu: document nxp,gpio-pin-interrupt

[Rob Herring]

On Sat, Feb 20, 2016 at 11:51:56PM +0100, Joachim Eastwood wrote:
> Update devicetree documention for lpc1850-scu with the new
> nxp,gpio-pin-interrupt property.
> 
> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
> ---
>  .../devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt        | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>