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* [PATCH v5 1/7] QE: Add IC, SI and SIRAM document to device tree bindings.
@ 2016-03-09  1:21 Zhao Qiang
       [not found] ` <1457486494-11377-1-git-send-email-qiang.zhao-3arQi8VN3Tc@public.gmane.org>
                   ` (2 more replies)
  0 siblings, 3 replies; 12+ messages in thread
From: Zhao Qiang @ 2016-03-09  1:21 UTC (permalink / raw)
  To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A
  Cc: oss-fOR+EgIDQEHk1uMJSBkQmQ, leoyang.li-3arQi8VN3Tc,
	xiaobo.xie-3arQi8VN3Tc, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ, Zhao Qiang

Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt

Signed-off-by: Zhao Qiang <qiang.zhao-3arQi8VN3Tc@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
changes for v2
	- Add interrupt-controller in Required properties
	- delete address-cells and size-cells for qe-si and qe-siram
Changes for v3
	- Add SoC specific caompatible strings to qe-si and qe-siram
Changes for v4
	- NA 
Changes for v5
	- NA 

 .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  | 50 ++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
index 4f89302..7ab21cb 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
@@ -69,6 +69,56 @@ Example:
 	};
      };
 
+* Interrupt Controller (IC)
+
+Required properties:
+- compatible : should be "fsl,qe-ic".
+- reg : Address range of IC register set.
+- interrupts : interrupts generated by the device.
+- interrupt-controller : this device is a interrupt controller.
+
+Example:
+
+	qeic: interrupt-controller@80 {
+		interrupt-controller;
+		compatible = "fsl,qe-ic";
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		reg = <0x80 0x80>;
+		interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+	};
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+	si1: si@700 {
+		compatible = "fsl,t1040-qe-si";
+		reg = <0x700 0x80>;
+	};
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+	siram1: siram@1000 {
+		compatible = "fsl,t1040-qe-siram";
+		reg = <0x1000 0x800>;
+	};
+
 * QE Firmware Node
 
 This node defines a firmware binary that is embedded in the device tree, for
-- 
2.1.0.27.g96db324

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^ permalink raw reply related	[flat|nested] 12+ messages in thread
end of thread, other threads:[~2016-05-17  1:41 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-03-09  1:21 [PATCH v5 1/7] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
     [not found] ` <1457486494-11377-1-git-send-email-qiang.zhao-3arQi8VN3Tc@public.gmane.org>
2016-03-09  1:21   ` [PATCH v5 2/7] QE: Add ucc hdlc document to bindings Zhao Qiang
2016-03-09  1:21   ` [PATCH v5 3/7] QE: Add uqe_serial " Zhao Qiang
2016-03-17 16:27     ` Rob Herring
2016-03-18  0:48       ` Qiang Zhao
2016-03-09  1:21   ` [PATCH v5 4/7] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl Zhao Qiang
2016-03-09  1:21   ` [PATCH v5 6/7] T104xRDB: Add qe node to t104xrdb Zhao Qiang
2016-03-09  1:21   ` [PATCH v5 7/7] T104xQDS: Add qe node to t104xqds Zhao Qiang
2016-03-09  1:21 ` [PATCH v5 5/7] T104xD4RDB: Add qe node to t104xd4rdb Zhao Qiang
2016-05-16 23:22 ` [v5,1/7] QE: Add IC, SI and SIRAM document to device tree bindings Scott Wood
2016-05-17  1:18   ` Qiang Zhao
2016-05-17  1:41     ` Scott Wood

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