[PATCHv3 1/2] spi/spi-xilinx: Add clock support

[PATCHv3 1/2] spi/spi-xilinx: Add clock support

[Shubhrajyoti Datta]

Add basic clock support. The clocks are requested at probe
and released at remove.

Signed-off-by: Shubhrajyoti Datta <shubhraj-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
---
v3 changes:
Do not fail probe if no clock is given
Add a clk name
Fix some space errors

 drivers/spi/spi-xilinx.c |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
index 3009121..426ce12 100644
--- a/drivers/spi/spi-xilinx.c
+++ b/drivers/spi/spi-xilinx.c
@@ -21,6 +21,7 @@
 #include <linux/spi/spi_bitbang.h>
 #include <linux/spi/xilinx_spi.h>
 #include <linux/io.h>
+#include <linux/clk.h>
 
 #define XILINX_SPI_MAX_CS	32
 
@@ -83,6 +84,7 @@ struct xilinx_spi {
 	struct spi_bitbang bitbang;
 	struct completion done;
 	void __iomem	*regs;	/* virt. address of the control registers */
+	struct clk *clk;
 
 	int		irq;
 
@@ -428,6 +430,22 @@ static int xilinx_spi_probe(struct platform_device *pdev)
 		goto put_master;
 	}
 
+	xspi->clk = devm_clk_get(&pdev->dev, "spi_fclk");
+	if (IS_ERR(xspi->clk)) {
+		if (PTR_ERR(xspi->clk) == -ENOENT) {
+			xspi->clk = NULL;
+		} else {
+			ret = PTR_ERR(xspi->clk);
+			goto put_master;
+		}
+	}
+
+	ret = clk_prepare_enable(xspi->clk);
+	if (ret) {
+		dev_err(&pdev->dev, "Unable to enable clock.\n");
+		goto put_master;
+	}
+
 	master->bus_num = pdev->id;
 	master->num_chipselect = num_cs;
 	master->dev.of_node = pdev->dev.of_node;
@@ -485,6 +503,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
 
 put_master:
 	spi_master_put(master);
+	clk_disable_unprepare(xspi->clk);
 
 	return ret;
 }
@@ -503,6 +522,7 @@ static int xilinx_spi_remove(struct platform_device *pdev)
 	xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);
 
 	spi_master_put(xspi->bitbang.master);
+	clk_disable_unprepare(xspi->clk);
 
 	return 0;
 }
-- 
1.7.1

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[PATCHv3 2/2] bindings: spi: Add clock entries for spi-xilinx

[Shubhrajyoti Datta]

Add clock description for spi-xilinx

Signed-off-by: Shubhrajyoti Datta <shubhraj-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
---
v3
Add a clock name

 .../devicetree/bindings/spi/spi-xilinx.txt         |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
index c7b7856..71bd464 100644
--- a/Documentation/devicetree/bindings/spi/spi-xilinx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt
@@ -7,6 +7,9 @@ Required properties:
 - interrupts		: Property with a value describing the interrupt
 			  number.
 - interrupt-parent	: Must be core interrupt controller
+- clocks: Input clock specifier. Refer to common clock bindings.
+- clock-names: tuple listing input clock names.
+	Required elements: "spi_fclk"
 
 Optional properties:
 - xlnx,num-ss-bits	: Number of chip selects used.
@@ -14,6 +17,8 @@ Optional properties:
 Example:
 	axi_quad_spi@41e00000 {
 			compatible = "xlnx,xps-spi-2.00.a";
+			clocks = <&clkc 15>;
+			clock-names = "spi_fclk";
 			interrupt-parent = <&intc>;
 			interrupts = <0 31 1>;
 			reg = <0x41e00000 0x10000>;
-- 
1.7.1

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Re: [PATCHv3 2/2] bindings: spi: Add clock entries for spi-xilinx

[Lars-Peter Clausen]

On 03/10/2016 01:11 PM, Shubhrajyoti Datta wrote:
[...]
> @@ -7,6 +7,9 @@ Required properties:
>  - interrupts		: Property with a value describing the interrupt
>  			  number.
>  - interrupt-parent	: Must be core interrupt controller
> +- clocks: Input clock specifier. Refer to common clock bindings.
> +- clock-names: tuple listing input clock names.
> +	Required elements: "spi_fclk"

Sorry for being pedantic, but the core has two clock input "s_axi_aclk" and
"ext_spi_clk". Which one is "spi_fclk"?

- Lars

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RE: [PATCHv3 2/2] bindings: spi: Add clock entries for spi-xilinx

[Shubhrajyoti Datta]

> -----Original Message-----
> From: Lars-Peter Clausen [mailto:lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org]
> Sent: Thursday, March 10, 2016 6:10 PM
> To: Shubhrajyoti Datta; linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: Soren Brinkmann; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Michal Simek;
> broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org; Shubhrajyoti Datta
> Subject: Re: [PATCHv3 2/2] bindings: spi: Add clock entries for spi-xilinx
> 
> On 03/10/2016 01:11 PM, Shubhrajyoti Datta wrote:
> [...]
> > @@ -7,6 +7,9 @@ Required properties:
> >  - interrupts		: Property with a value describing the interrupt
> >  			  number.
> >  - interrupt-parent	: Must be core interrupt controller
> > +- clocks: Input clock specifier. Refer to common clock bindings.
> > +- clock-names: tuple listing input clock names.
> > +	Required elements: "spi_fclk"
> 
> Sorry for being pedantic, but the core has two clock input "" and
> "ext_spi_clk". Which one is "spi_fclk"?

However for all my designs I adhere to the recommendation see below both are from the same clock source.
I  named it spi_fclk.

Do you think I should have 2 clocks requests on the same clock.


http://www.xilinx.com/support/documentation/ip_documentation/axi_quad_spi/v2_00_a/ds843_axi_quad_spi.pdf

page 12

15. It is recommended that the AXI4 interface clock and EXT_SPI_CLK clock originate from the same clock source.
> 
> - Lars

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Re: [PATCHv3 2/2] bindings: spi: Add clock entries for spi-xilinx

[Sören Brinkmann]

On Thu, 2016-03-10 at 21:20:39 -0800, Shubhrajyoti Datta wrote:
> 
> 
> > -----Original Message-----
> > From: Lars-Peter Clausen [mailto:lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org]
> > Sent: Thursday, March 10, 2016 6:10 PM
> > To: Shubhrajyoti Datta; linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > Cc: Soren Brinkmann; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; Michal Simek;
> > broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org; Shubhrajyoti Datta
> > Subject: Re: [PATCHv3 2/2] bindings: spi: Add clock entries for spi-xilinx
> > 
> > On 03/10/2016 01:11 PM, Shubhrajyoti Datta wrote:
> > [...]
> > > @@ -7,6 +7,9 @@ Required properties:
> > >  - interrupts		: Property with a value describing the interrupt
> > >  			  number.
> > >  - interrupt-parent	: Must be core interrupt controller
> > > +- clocks: Input clock specifier. Refer to common clock bindings.
> > > +- clock-names: tuple listing input clock names.
> > > +	Required elements: "spi_fclk"
> > 
> > Sorry for being pedantic, but the core has two clock input "" and
> > "ext_spi_clk". Which one is "spi_fclk"?
> 
> However for all my designs I adhere to the recommendation see below both are from the same clock source.
> I  named it spi_fclk.
> 
> Do you think I should have 2 clocks requests on the same clock.
> 
> 
> http://www.xilinx.com/support/documentation/ip_documentation/axi_quad_spi/v2_00_a/ds843_axi_quad_spi.pdf
> 
> page 12
> 
> 15. It is recommended that the AXI4 interface clock and EXT_SPI_CLK clock originate from the same clock source.

If they can be separate they should both be modeled in the CCF. There is
no issue of them coming from the same source.
Also, the name should map to the name from the spec, as Lars pointed out
already. You should not invent new names for clocks that are clearly
defined in the data sheet.

	Sören
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RE: [PATCHv3 2/2] bindings: spi: Add clock entries for spi-xilinx

[Shubhrajyoti Datta]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 867 bytes --]


>
> If they can be separate they should both be modeled in the CCF. There is no
> issue of them coming from the same source.
> Also, the name should map to the name from the spec, as Lars pointed out
> already. You should not invent new names for clocks that are clearly defined
> in the data sheet.

Will fix in the next version

>
>       Sören


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