From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jon Hunter Subject: [PATCH V4 1/3] Documentation: DT: Add binding documentation for NVIDIA ADMA Date: Tue, 15 Mar 2016 15:56:28 +0000 Message-ID: <1458057390-20756-2-git-send-email-jonathanh@nvidia.com> References: <1458057390-20756-1-git-send-email-jonathanh@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1458057390-20756-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Laxman Dewangan , Vinod Koul , Stephen Warren , Thierry Reding , Alexandre Courbot , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Cc: dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Jon Hunter List-Id: devicetree@vger.kernel.org Add device-tree binding documentation for the Tegra210 Audio DMA controller. Signed-off-by: Jon Hunter --- .../devicetree/bindings/dma/tegra210-adma.txt | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/tegra210-adma.txt diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt b/Documentation/devicetree/bindings/dma/tegra210-adma.txt new file mode 100644 index 000000000000..04ee77d6c79d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/tegra210-adma.txt @@ -0,0 +1,61 @@ +* NVIDIA Tegra Audio DMA (ADMA) controller + +The Tegra Audio DMA controller that is used for transferring data +between system memory and the Audio Processing Engine (APE). + +Required properties: +- compatible: Must be "nvidia,tegra210-adma". +- reg: Should contain DMA registers location and length. This should be + a single entry that includes all of the per-channel registers in one + contiguous bank. +- interrupt-parent: Phandle to the interrupt parent controller. +- interrupts: Should contain all of the per-channel DMA interrupts in + ascending order with respect to the DMA channel index. +- clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE), + APE interface clock (TEGRA210_CLK_APB2APE) and ADMA module clock + (TEGRA210_CLK_D_AUDIO). +- clock-names: Must contain the names "ape", "apb2ape" and "d_audio" + for the corresponding 'clocks' entries. +- #dma-cells : Must be 1. The first cell denotes the receive/transmit + request number and should be between 1 and the maximum number of + requests supported. This value corresponds to the RX/TX_REQUEST_SELECT + fields in the ADMA_CHn_CTRL register. +- power-domains: Must contain a phandle that points to the audio + powergate (namely 'aud') for Tegra210. + + +Example: + +adma: dma@702e2000 { + compatible = "nvidia,tegra210-adma"; + reg = <0x0 0x702e2000 0x0 0x2000>; + interrupt-parent = <&tegra_agic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&tegra_car TEGRA210_CLK_APE>, + <&tegra_car TEGRA210_CLK_APB2APE>, + <&tegra_car TEGRA210_CLK_D_AUDIO>; + clock-names = "ape", "apb2ape", "d_audio"; + power-domains = <&pd_audio>; + #dma-cells = <1>; +}; -- 2.1.4